Lines Matching +full:- +full:ge
28 // -----------------------------------------------------------------------------
30 // test/aarch32/config/template-assembler-aarch32.cc.in template file using
34 // -----------------------------------------------------------------------------
37 #include "test-runner.h"
39 #include "test-utils.h"
40 #include "test-utils-aarch32.h"
42 #include "aarch32/assembler-aarch32.h"
43 #include "aarch32/macro-assembler-aarch32.h"
99 {{ge, r5, r0, LSL, 3}, true, ge, "ge r5 r0 LSL 3", "ge_r5_r0_LSL_3"},
101 {{ge, r6, r6, LSL, 28}, true, ge, "ge r6 r6 LSL 28", "ge_r6_r6_LSL_28"},
105 {{ge, r0, r1, LSL, 6}, true, ge, "ge r0 r1 LSL 6", "ge_r0_r1_LSL_6"},
126 {{ge, r1, r3, LSL, 10}, true, ge, "ge r1 r3 LSL 10", "ge_r1_r3_LSL_10"},
143 {{ge, r5, r3, LSL, 26}, true, ge, "ge r5 r3 LSL 26", "ge_r5_r3_LSL_26"},
147 {{ge, r1, r3, LSL, 20}, true, ge, "ge r1 r3 LSL 20", "ge_r1_r3_LSL_20"},
165 {{ge, r1, r3, LSL, 25}, true, ge, "ge r1 r3 LSL 25", "ge_r1_r3_LSL_25"},
168 {{ge, r4, r5, LSL, 19}, true, ge, "ge r4 r5 LSL 19", "ge_r4_r5_LSL_19"},
181 {{ge, r2, r3, LSL, 21}, true, ge, "ge r2 r3 LSL 21", "ge_r2_r3_LSL_21"},
241 {{ge, r2, r0, LSL, 4}, true, ge, "ge r2 r0 LSL 4", "ge_r2_r0_LSL_4"},
292 {{ge, r0, r2, LSL, 7}, true, ge, "ge r0 r2 LSL 7", "ge_r0_r2_LSL_7"},
294 {{ge, r1, r7, LSL, 24}, true, ge, "ge r1 r7 LSL 24", "ge_r1_r7_LSL_24"},
318 {{ge, r6, r7, LSL, 9}, true, ge, "ge r6 r7 LSL 9", "ge_r6_r7_LSL_9"},
353 {{ge, r7, r1, LSL, 27}, true, ge, "ge r7 r1 LSL 27", "ge_r7_r1_LSL_27"},
362 {{ge, r2, r3, LSL, 2}, true, ge, "ge r2 r3 LSL 2", "ge_r2_r3_LSL_2"},
377 {{ge, r2, r1, LSL, 2}, true, ge, "ge r2 r1 LSL 2", "ge_r2_r1_LSL_2"},
395 {{ge, r3, r2, LSL, 9}, true, ge, "ge r3 r2 LSL 9", "ge_r3_r2_LSL_9"},
419 {{ge, r7, r4, LSL, 13}, true, ge, "ge r7 r4 LSL 13", "ge_r7_r4_LSL_13"},
426 {{ge, r2, r6, LSL, 8}, true, ge, "ge r2 r6 LSL 8", "ge_r2_r6_LSL_8"},
438 {{ge, r1, r3, LSL, 17}, true, ge, "ge r1 r3 LSL 17", "ge_r1_r3_LSL_17"},
455 {{ge, r3, r5, LSL, 17}, true, ge, "ge r3 r5 LSL 17", "ge_r3_r5_LSL_17"},
473 {{ge, r2, r6, LSL, 30}, true, ge, "ge r2 r6 LSL 30", "ge_r2_r6_LSL_30"},
491 {{ge, r3, r6, LSL, 17}, true, ge, "ge r3 r6 LSL 17", "ge_r3_r6_LSL_17"},
498 {{ge, r1, r1, LSL, 28}, true, ge, "ge r1 r1 LSL 28", "ge_r1_r1_LSL_28"},
519 {{ge, r2, r6, LSL, 11}, true, ge, "ge r2 r6 LSL 11", "ge_r2_r6_LSL_11"},
532 {{ge, r5, r1, LSL, 25}, true, ge, "ge r5 r1 LSL 25", "ge_r5_r1_LSL_25"},
580 {{ge, r1, r1, LSL, 13}, true, ge, "ge r1 r1 LSL 13", "ge_r1_r1_LSL_13"},
610 {{ge, r5, r4, LSL, 11}, true, ge, "ge r5 r4 LSL 11", "ge_r5_r4_LSL_11"},
623 {{ge, r4, r0, LSL, 15}, true, ge, "ge r4 r0 LSL 15", "ge_r4_r0_LSL_15"},
634 {{ge, r1, r0, LSL, 15}, true, ge, "ge r1 r0 LSL 15", "ge_r1_r0_LSL_15"},
646 {{ge, r2, r5, LSL, 7}, true, ge, "ge r2 r5 LSL 7", "ge_r2_r5_LSL_7"},
660 {{ge, r7, r6, LSL, 10}, true, ge, "ge r7 r6 LSL 10", "ge_r7_r6_LSL_10"},
663 {{ge, r4, r2, LSL, 19}, true, ge, "ge r4 r2 LSL 19", "ge_r4_r2_LSL_19"},
687 {{ge, r2, r6, LSL, 27}, true, ge, "ge r2 r6 LSL 27", "ge_r2_r6_LSL_27"},
702 {{ge, r5, r3, LSL, 1}, true, ge, "ge r5 r3 LSL 1", "ge_r5_r3_LSL_1"},
717 {{ge, r1, r1, LSL, 8}, true, ge, "ge r1 r1 LSL 8", "ge_r1_r1_LSL_8"},
727 {{ge, r1, r0, LSL, 28}, true, ge, "ge r1 r0 LSL 28", "ge_r1_r0_LSL_28"},
742 {{ge, r1, r7, LSL, 30}, true, ge, "ge r1 r7 LSL 30", "ge_r1_r7_LSL_30"},
762 {{ge, r6, r7, LSL, 21}, true, ge, "ge r6 r7 LSL 21", "ge_r6_r7_LSL_21"},
793 {{ge, r2, r6, LSL, 22}, true, ge, "ge r2 r6 LSL 22", "ge_r2_r6_LSL_22"},
795 {{ge, r5, r1, LSL, 18}, true, ge, "ge r5 r1 LSL 18", "ge_r5_r1_LSL_18"},
839 {{ge, r4, r4, LSL, 4}, true, ge, "ge r4 r4 LSL 4", "ge_r4_r4_LSL_4"},
844 {{ge, r5, r1, LSL, 27}, true, ge, "ge r5 r1 LSL 27", "ge_r5_r1_LSL_27"},
858 {{ge, r0, r7, LSL, 5}, true, ge, "ge r0 r7 LSL 5", "ge_r0_r7_LSL_5"},
892 {{ge, r5, r6, LSL, 5}, true, ge, "ge r5 r6 LSL 5", "ge_r5_r6_LSL_5"},
919 {{ge, r7, r0, LSL, 7}, true, ge, "ge r7 r0 LSL 7", "ge_r7_r0_LSL_7"},
929 {{ge, r7, r0, LSL, 20}, true, ge, "ge r7 r0 LSL 20", "ge_r7_r0_LSL_20"},
933 {{ge, r4, r1, LSL, 23}, true, ge, "ge r4 r1 LSL 23", "ge_r4_r1_LSL_23"},
940 {{ge, r1, r2, LSL, 4}, true, ge, "ge r1 r2 LSL 4", "ge_r1_r2_LSL_4"},
965 {{ge, r4, r1, LSL, 19}, true, ge, "ge r4 r1 LSL 19", "ge_r4_r1_LSL_19"},
969 {{ge, r3, r0, LSL, 20}, true, ge, "ge r3 r0 LSL 20", "ge_r3_r0_LSL_20"},
976 {{ge, r1, r0, LSL, 23}, true, ge, "ge r1 r0 LSL 23", "ge_r1_r0_LSL_23"},
982 {{ge, r5, r3, LSL, 15}, true, ge, "ge r5 r3 LSL 15", "ge_r5_r3_LSL_15"},
997 {{ge, r6, r1, LSL, 21}, true, ge, "ge r6 r1 LSL 21", "ge_r6_r1_LSL_21"},
1021 {{ge, r0, r4, LSL, 30}, true, ge, "ge r0 r4 LSL 30", "ge_r0_r4_LSL_30"},
1054 {{ge, r2, r0, LSL, 18}, true, ge, "ge r2 r0 LSL 18", "ge_r2_r0_LSL_18"},
1099 #include "aarch32/traces/assembler-cond-rd-operand-rn-shift-amount-1to31-in-it-block-mov-t32.h"
1118 // Values to pass to the macro-assembler. in TestHelper()
1139 masm.GetBuffer()->GetOffsetAddress<const byte*>(start); in TestHelper()
1141 uint32_t result_size = end - start; in TestHelper()
1216 total_error_count - kErrorReportLimit); in TestHelper()