Lines Matching +full:getting +full:- +full:started
30 ---------------------
32 …tps://ci.linaro.org/buildStatus/icon?job=linaro-art-vixlpresubmit)](https://ci.linaro.org/job/lina…
33 …rg/buildStatus/icon?job=linaro-art-vixlpresubmit-native-armv8)](https://ci.linaro.org/job/linaro-a…
34 …inaro.org/buildStatus/icon?job=linaro-art-vixlpresubmit-macos)](https://ci.linaro.org/job/linaro-a…
55 A 64-bit host machine is required, implementing an LP64 data model. VIXL has
64 3. clang-format-4.0
65 4. clang-tidy-4.0
69 Note that in Ubuntu 18.04, clang-tidy-4.0 will only work if the clang-4.0
76 |------------|-----------------------|---------------------------------|
77 | BTI | kBTI | Per-page enabling not supported |
103 `masm.GetCPUFeatures()->Combine(CPUFeatures::kSVE);`.
105 See [the cpu features header file](src/cpu-features.h) for more information.
121 [list of supported A64 instructions](doc/aarch64/supported-instructions-aarch64.md).
123 The VIXL simulator was developed to run on 64-bit amd64 platforms. Whilst it
124 builds and mostly works for 32-bit x86 platforms, there are a number of
125 floating-point operations which do not work correctly, and a number of tests
129 ------------
131 Your project's build system must define `VIXL_DEBUG` (eg. `-DVIXL_DEBUG`)
139 Exclusive-Access Instructions
140 -----------------------------
142 All exclusive-access instructions are supported, but the simulator cannot
147 as expected in a single-threaded environment.
148 * The global monitor is simulated by occasionally causing exclusive-access
150 * Load-acquire, store-release semantics are approximated by issuing a host
151 memory barrier after loads or before stores. The built-in
157 * A pair of load-/store-exclusive instructions will only succeed if they have
159 * Most of the time, cache-maintenance operations or explicit memory accesses
170 -----------------------
174 As with any self-modifying code, vulnerabilities in the client or in VIXL itself
177 For performance reasons, VIXL's Assembler only performs debug-mode checking of
179 code-generation overheads for advanced compilers that already model instructions
184 The MacroAssembler synthesises multiple-instruction sequences to support _some_
191 user-supplied data, but does not usually handle inputs which are likely to be
192 easily covered by tests. For example, move-immediate arguments are likely to be
193 data-dependent, but register types (e.g. `x` vs `w`) are not.
213 -----------------
231 `--nolint`. This removes the dependency on `cpplint.py` and Git. The `--nolint`
234 Additionally, `tools/test.py` tests code formatting using `clang-format-4.0`,
235 and performs static analysis using `clang-tidy-4.0`. If you don't have these
236 tools, disable the test using `--noclang-format` or `--noclang-tidy`,
243 Getting Started
244 ---------------
248 [here][getting-started-aarch32], while the AArch64 guide is
249 [here][getting-started-aarch64]. Example source code is provided in the
252 `scons --help` to get a detailed list of available build targets.
257 [cpplint]: https://github.com/google/styleguide/tree/gh-pages/cpplint
263 [getting-started-aarch32]: doc/aarch32/getting-started-aarch32.md
266 [getting-started-aarch64]: doc/aarch64/getting-started-aarch64.md