Lines Matching full:needs
76 CPU. This needs to be enabled for all revisions of the CPU.
81 CPU. This needs to be enabled only for revision >= r3p0 of the CPU.
84 CPU. This needs to be enabled only for revision >= r3p0 of the CPU.
89 CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
92 CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
97 CPUs. This needs to be enabled only for revision r0p0 of Cortex-A35.
102 CPUs. This needs to be enabled only for revision <= r0p1 of Cortex-A53.
105 CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53.
108 CPU. This needs to be enabled only for revision <= r0p2 of the CPU.
111 CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53.
114 link time to Cortex-A53 CPU. This needs to be enabled for some variants of
119 CPU. This needs to be enabled only for revision <= r0p3 of the CPU. From
124 to Cortex-A53 CPU. This needs to be enabled for some variants of revision
141 CPU. This needs to be enabled only for revision r0p0 of the CPU.
144 CPU. This needs to be enabled only for revision r0p0 of the CPU.
147 CPU. This needs to be enabled only for revision r0p0 of the CPU.
150 CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
153 CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
156 CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
164 CPU. This needs to be enabled only for revision r0p0 of the CPU.
167 CPU. This needs to be enabled only for revision r0p0 of the CPU.
170 CPU. This needs to be enabled only for revision r0p0 of the CPU.
173 CPU. This needs to be enabled only for revision r0p0 of the CPU.
176 CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
179 CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
182 CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
185 CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
188 CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
191 CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
194 CPU. This needs to be enabled only for revision <= r1p3 of the CPU.
202 CPU. This needs to be enabled only for revision <= r0p3 of the CPU.
210 CPU. This needs to be enabled only for revision r0p0 of the CPU.
213 CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
218 CPU. This needs to be enabled only for revision r0p0 of the CPU.
221 CPU. This needs to be enabled only for revision r0p0 of the CPU.
226 CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
229 CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
232 CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
235 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
238 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
241 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
244 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
247 CPU. This needs to be enabled only for revision <= r4p0 of the CPU.
255 CPU. This needs to be enabled only for revision <= r4p0 of the CPU.
258 CPU. This needs to be enabled only for revisions r3p0 - r4p1 of the CPU.
261 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is
267 CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
270 CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
273 CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
276 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open.
279 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open.
282 CPU. This needs to be enabled for revisions <= r1p1 of the CPU.
285 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open.
290 CPU. This needs to be enabled only for revision r0p0 - r1p0 of the CPU.
293 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the CPU.
296 CPU. This needs to be enabled for revisions r1p0 and r1p1, r0p0 has the same
300 CPU. This needs to be enabled for revisions r0p0 and r1p0.
303 CPU. This needs to be enabled for revision r0p0, it is fixed in r1p0.
306 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2. It
310 CPU. This needs to be enabled for revisions r1p0, r1p1, and r1p2. The issue
314 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and
318 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and
323 interconnect IP. This needs to be enabled for revisions r0p0, r1p0, r1p1
327 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and
331 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2, and
335 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 and
341 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1.
345 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This
349 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2.
353 Cortex-A78AE CPU. This needs to be enabled for revisions r0p0 and r0p1. This
358 an ARM interconnect IP. This needs to be enabled for revisions r0p0, r0p1 and
364 Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is
368 Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is
372 Cortex-A78C CPU. This needs to be enabled for revisions r0p1, r0p2 and
376 Cortex-A78C CPU. This needs to be enabled for revisions r0p1, r0p2 and
380 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This
384 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This
388 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2. This
393 an ARM interconnect IP. This needs to be enabled for revisions r0p1 and r0p2
397 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2.
401 Cortex-A78C CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2.
405 Cortex-A78C CPU. This needs to be enabled for revisions r0p1 and r0p2.
411 CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
414 CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
417 CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
422 CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU.
425 CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
428 CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
431 CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
434 CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
437 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
440 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
443 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
446 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
449 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
452 CPU. This needs to be enabled only for revisions r3p0 - r4p0 of the CPU.
455 CPU. This needs to be enabled only for revision <= r4p0 of the CPU.
458 CPU. This needs to be enabled for revisions r3p0, r3p1, r4p0, and r4p1, for
462 CPU. This needs to be enabled for all revisions <= r4p1 of the CPU and is
468 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
472 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
476 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
480 CPU. This needs to be enabled only for revisions r0p0 and r1p0, it is fixed
484 CPU. This needs to be enabled for r0p0, r1p0, and r1p1, it is still open.
487 CPU. This needs to be enabled only for revision r1p0 and r1p1 of the
491 CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the
496 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the
500 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 of the CPU.
504 CPU. This needs to be enabled for revisions r1p0 and r1p1 of the CPU, the
509 CPU. This needs to be enabled for revisions r0p0, r1p0, and r1p1 and r1p2 of
513 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU.
517 CPU. This needs to be enabled for revisions r0p0, r1p0 and r1p1 of the CPU.
522 interconnect IP. This needs to be enabled for revisions r0p0, r1p0 and r1p1.
526 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1 and r1p2 of the
530 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, and r1p2 of the
534 CPU. This needs to be enabled for revisions r0p0, r1p0, r1p1, r1p2 of the
540 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is still
544 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
548 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
553 IP. This needs to be enabled for revisions r0p0 and r0p1. It has been fixed
557 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
561 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
565 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in
569 CPU, this affects all configurations. This needs to be enabled for revisions
575 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
579 Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
583 Cortex-A710 CPU. This needs to be enabled for revisions r1p0, r2p0 of the CPU
587 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
591 Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU and
595 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
599 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
603 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
607 Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU
611 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
615 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and
619 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
623 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
627 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0
632 interconnect IP. This needs to be enabled for r0p0, r1p0, r2p0 and r2p1 and
636 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and
640 Cortex-A710 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and
644 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
650 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
653 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
656 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
659 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
662 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
665 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
668 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2, r0p3 and is still open.
671 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
674 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
677 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
680 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
683 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
687 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
691 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2 of the CPU,
695 CPU. This needs to be enabled for revision r0p0, r0p1, r0p2, r0p3 and is still open.
698 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
702 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed
706 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed
711 interconnect IP. This needs to be enabled for revisions r0p0, r0p1 and r0p2.
715 CPU. This needs to be enabled for revisions r0p0, r0p1 and r0p2. It is fixed
721 CPU. This needs to be enabled for revisions r0p0, r1p0, and r2p0 of the CPU,
725 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the CPU,
729 CPU. This needs to be enabled for revision r2p0 of the CPU, it is still open.
732 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
736 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
740 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r2p0 of the
744 CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed
748 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
752 CPU. This needs to be enabled for revisions r0p0, r1p0 and r2p0 of the CPU
757 This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 and is
761 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
765 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
769 CPU. This needs to be enabled for revisions r0p0, r1p0, r2p0 and r2p1 of the
775 CPU. This needs to be enabled only for revisions r0p0, r1p0, r1p1 and r1p2 of
779 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU, it
783 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1, it is
787 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0
791 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0 and r1p0
795 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the
799 CPU. This needs to be enabled only for revisions r0p0 and r1p0 of the CPU.
804 IP. This needs to be applied to revisions r0p0, r1p0 and r1p1. It is fixed
808 Cortex-X3 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
812 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1. It is
816 CPU. This needs to be enabled only for revisions r0p0, r1p0 and r1p1 of the
823 This needs to be enabled for revisions r0p0 and is fixed in r0p1.
830 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed
834 CPU. This needs to be enabled for revisions r0p0 and r0p1. It is fixed in r0p2.
839 Cortex-A510 CPU. This needs to be enabled only for revision r0p0, it is
843 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1,
847 Cortex-A510 CPU. This needs to be enabled only for revisions r0p0, r0p1 and
851 Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is fixed
856 Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is
861 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
866 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
870 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
874 Cortex-A510 CPU. This needs to be enabled for revisions r0p0, r0p1, r0p2,
878 Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2,
882 Cortex-A510 CPU. This needs to applied for revisions r0p0, r0p1, r0p2,
886 Cortex-A510 CPU. This needs to be applied to revision r0p0, r0p1, r0p2,
892 Cortex-A520 CPU. This needs to applied for revisions r0p0, r0p1 of the
896 Cortex-A520 CPU. This needs to be enabled for revisions r0p0 and r0p1.
902 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0.
906 Cortex-A715 CPU. This needs to be enabled for revisions r0p0 and r1p0. It is
910 Cortex-A715 CPU. This needs to be enabled only for revision r1p0 and
915 Cortex-A715 CPU. This needs to be enabled only for revision r1p0.
919 Cortex-A715 CPU. This needs to be enabled for revision r1p0. There is no
923 Cortex-A715 CPU. This needs to be enabled only for revision r1p0.
927 Cortex-A715 CPU. This needs to be enabled for revisions r0p0, r1p0
933 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1.
937 Cortex-A720 CPU. This needs to be enabled for revisions r0p0 and r0p1.
993 flag enforces this behaviour. This needs to be enabled only for revisions
997 ``A53_DISABLE_NON_TEMPORAL_HINT`` but for Cortex-A57. This needs to be