Lines Matching full:revision
49 The errata workarounds are implemented for a particular revision or a set of
62 these workarounds are enabled for the wrong CPU revision then the errata
81 CPU. This needs to be enabled only for revision >= r3p0 of the CPU.
84 CPU. This needs to be enabled only for revision >= r3p0 of the CPU.
89 CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
92 CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
97 CPUs. This needs to be enabled only for revision r0p0 of Cortex-A35.
102 CPUs. This needs to be enabled only for revision <= r0p1 of Cortex-A53.
105 CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53.
108 CPU. This needs to be enabled only for revision <= r0p2 of the CPU.
111 CPUs. This needs to be enabled only for revision <= r0p2 of Cortex-A53.
115 revision <= r0p4. This workaround can lead the linker to create ``*.stub``
119 CPU. This needs to be enabled only for revision <= r0p3 of the CPU. From
124 to Cortex-A53 CPU. This needs to be enabled for some variants of revision
129 CPUs. Though the erratum is present in every revision of the CPU,
141 CPU. This needs to be enabled only for revision r0p0 of the CPU.
144 CPU. This needs to be enabled only for revision r0p0 of the CPU.
147 CPU. This needs to be enabled only for revision r0p0 of the CPU.
150 CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
153 CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
156 CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
164 CPU. This needs to be enabled only for revision r0p0 of the CPU.
167 CPU. This needs to be enabled only for revision r0p0 of the CPU.
170 CPU. This needs to be enabled only for revision r0p0 of the CPU.
173 CPU. This needs to be enabled only for revision r0p0 of the CPU.
176 CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
179 CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
182 CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
185 CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
188 CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
191 CPU. This needs to be enabled only for revision <= r1p2 of the CPU.
194 CPU. This needs to be enabled only for revision <= r1p3 of the CPU.
202 CPU. This needs to be enabled only for revision <= r0p3 of the CPU.
210 CPU. This needs to be enabled only for revision r0p0 of the CPU.
213 CPU. This needs to be enabled only for revision <= r0p1 of the CPU.
218 CPU. This needs to be enabled only for revision r0p0 of the CPU.
221 CPU. This needs to be enabled only for revision r0p0 of the CPU.
226 CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
229 CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
232 CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
235 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
238 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
241 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
244 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
247 CPU. This needs to be enabled only for revision <= r4p0 of the CPU.
255 CPU. This needs to be enabled only for revision <= r4p0 of the CPU.
267 CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
270 CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
273 CPU. This needs to be enabled only for revision <= r1p1 of the CPU.
290 CPU. This needs to be enabled only for revision r0p0 - r1p0 of the CPU.
297 issue but there is no workaround for that revision.
303 CPU. This needs to be enabled for revision r0p0, it is fixed in r1p0.
364 Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is
368 Cortex-A78C CPU. This needs to be enabled for revision r0p0. The erratum is
411 CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
414 CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
417 CPU. This needs to be enabled only for revision <= r1p0 of the CPU.
422 CPU. This needs to be enabled only for revision r0p0 and r1p0 of the CPU.
425 CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
428 CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
431 CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
434 CPU. This needs to be enabled only for revision <= r2p0 of the CPU.
437 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
440 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
443 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
446 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
449 CPU. This needs to be enabled only for revision <= r3p0 of the CPU.
455 CPU. This needs to be enabled only for revision <= r4p0 of the CPU.
468 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
487 CPU. This needs to be enabled only for revision r1p0 and r1p1 of the
493 revision. It is still open.
506 revision. It is still open.
591 Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU and
607 Cortex-A710 CPU. This needs to be enabled for revision r2p0 of the CPU
650 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
653 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
656 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
659 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
662 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
665 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
671 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
674 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
677 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
680 CPU. This needs to be enabled for revision r0p0 of the CPU and is fixed in r0p1.
683 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
687 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
695 CPU. This needs to be enabled for revision r0p0, r0p1, r0p2, r0p3 and is still open.
698 CPU. This needs to be enabled for revision r0p0 of the CPU, it is fixed in
729 CPU. This needs to be enabled for revision r2p0 of the CPU, it is still open.
744 CPU. This needs to be enabled only for revision r2p0 of the CPU, it is fixed
839 Cortex-A510 CPU. This needs to be enabled only for revision r0p0, it is
851 Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is fixed
856 Cortex-A510 CPU. This needs to be enabled only for revision r0p2 and is
886 Cortex-A510 CPU. This needs to be applied to revision r0p0, r0p1, r0p2,
910 Cortex-A715 CPU. This needs to be enabled only for revision r1p0 and
915 Cortex-A715 CPU. This needs to be enabled only for revision r1p0.
919 Cortex-A715 CPU. This needs to be enabled for revision r1p0. There is no
920 workaround for revision r0p0. It is fixed in r1p1.
923 Cortex-A715 CPU. This needs to be enabled only for revision r1p0.
958 revision is r0p0 (on r0p1 it is fixed). However, please note that this
963 contain the ACP interface **and** the DSU revision is older than r2p0 (on