Lines Matching full:i965

36 -  New fragment shader back-end for i965-class hardware.
37 - Support for Sandybridge chipset in i965 DRI driver.
81 [i965 gles2c bisected] OpenGL ES 2.0 conformance
108 [i965] brw_fs.cpp:1461: void
143 - i965: Update renderer strings for sandybridge
1034 - i965: Share the KIL_NV implementation between glsl and non-glsl.
1035 - i965: Also enable CC statistics when doing OQs.
1036 - i965: Track the windowizer's dispatch for kill pixel, promoted, and
1043 - i965: Fix the vector/expression splitting for the write_mask change.
1044 - i965: When splitting vector variable assignment, ignore unset
1046 - i965: Update expression splitting for the vector-result change to
1048 - i965: Warning fix for vector result any_nequal/all_equal change.
1063 - i965: Add support for rendering to SARGB8 FBOs.
1073 - i965: Fix up writemasked assignments in the new FS.
1074 - i965: Remove swizzling of assignment to vector-splitting
1076 - i965: Handle all_equal/any_nequal in the new FS.
1077 - i965: Fix vector splitting RHS channel selection with sparse
1079 - i965: Add support for dFdx()/dFdy() to the FS backend.
1080 - i965: Add support for attribute interpolation on Sandybridge.
1081 - i965: Set up inputs to the fragment shader according to FP
1083 - i965: Add support for POW in gen6 FS.
1084 - i965: Fix negation in the new FS backend.
1085 - i965: Actually track the "if" depth in loop in the new FS backend.
1086 - i965: Apply the same set of lowering passes to new FS as to Mesa IR.
1087 - i965: Fix valgrind complaint about base_ir for new FS debugging.
1088 - i965: Fix up the FS backend for the variable array indexing pass.
1089 - i965: Set the variable type when dereferencing an array.
1090 - i965: Add support for dereferencing structs to the new FS backend.
1091 - i965: Add support for struct, array, and matrix uniforms to FS
1093 - i965: Fix all non-snb regression in the snb attribute interpolation
1095 - i965: Fix up part of my Sandybridge attributes support patch.
1096 - i965: Add support for gl_FrontFacing to the new FS backend.
1097 - i965: Subtract instead of adding when computing y delta in new FS
1100 - i965: Set up sampler numbers in the FS backend.
1101 - i965: Add support for non-color render target write data to new FS
1103 - i965: Add support for MRT to the new FS backend.
1104 - i965: Add support for ir_loop counters to the new FS backend.
1105 - i965: Add support for ARB_fragment_coord_conventions to the new FS
1108 - i965: Do interpolation for varying matrices and arrays in the FS
1110 - i965: Don't try to emit interpolation for unused varying slots.
1111 - i965: Fix array indexing of arrays of matrices.
1112 - i965: Clean up obsolete FINISHME comment.
1115 - i965: Add support for builtin uniforms to the new FS backend.
1116 - i965: Fix use of undefined mem_ctx in vector splitting.
1118 - i965: Clean up the virtual GRF handling.
1120 - i965: First cut at register allocation using graph coloring.
1121 - i965: Add live interval analysis and hook it up to the register
1123 - i965: Remove my "safety counter" code from loops.
1124 - i965: Fix whole-structure/array assignment in new FS.
1127 - i965: Fix new FS handling of builtin uniforms with packed scalars in
1130 - i965: Use the lowering pass for texture projection.
1131 - i965: Split the gen4 and gen5 sampler handling apart.
1132 - i965: Add gen6 attribute interpolation to new FS backend.
1133 - i965: Fix the gen6 jump size for BREAK/CONT in new FS.
1134 - i965: Also increment attribute location when skipping unused slots.
1135 - i965: Pre-gen6, map VS outputs (not FS inputs) to URB setup in the
1137 - i965: Add real support for pre-gen5 texture sampling to the new FS.
1138 - i965: Fix up copy'n'pasteo from moving coordinate setup around for
1140 - i965: Restore the forcing of aligned pairs for delta_xy on chips with
1142 - i965: When producing a single channel swizzle, don't make a
1144 - i965: Add a sanity check for register allocation sizes.
1145 - i965: Fix off-by-ones in handling the last members of register
1147 - i965: Don't try to emit code if we failed register allocation.
1148 - i965: Add support for EXT_texture_swizzle to the new FS backend.
1149 - i965: Set up swizzling of shadow compare results for
1151 - i965: Fix glean/texSwizzle regression in previous commit.
1152 - i965: Be more conservative on live interval calculation.
1153 - i965: Add trivial dead code elimination in the new FS backend.
1154 - i965: Add initial folding of constants into operand immediate slots.
1155 - i965: In disasm, gen6 fb writes don't put msg reg # in
1157 - i965: Add support for gen6 FB writes to the new FS.
1158 - i965: Enable the constant propagation code.
1159 - i965: Also do constant propagation for the second operand of CMP.
1160 - i965: Add back gen6 headerless FB writes to the new FS backend.
1161 - i965: Gen6 no longer has the IFF instruction; always use IF.
1162 - i965: Fix up IF/ELSE/ENDIF for gen6.
1163 - i965: Fix botch in the header_present case in the new FS.
1164 - i965: Add some clarification of the WECtrl field.
1165 - i965: Don't do 1/w multiplication in new FS for gen6
1166 - i965: Gen6's sampler messages are the same as Ironlake.
1167 - i965: Refactor gl_FrontFacing setup out of general variable setup.
1168 - i965: Add support for gl_FrontFacing on gen6.
1169 - i965: Don't assume that WPOS is always provided on gen6 in the new
1171 - i965: Fix gen6 pointsize handling to match pre-gen6.
1172 - i965: Disable emitting if () statements on gen6 until we really fix
1174 - i965: Normalize cubemap coordinates like is done in the Mesa IR path.
1176 - i965: Drop the check for duplicate \_mesa_add_state_reference.
1177 - i965: Drop the check for YUV constants in the param list.
1178 - i965: Handle swizzles in the addition of YUV texture constants.
1179 - i965: Fix gen6 WM push constants updates.
1180 - i965: Fix new FS gen6 interpolation for sparsely-populated arrays.
1181 - i965: Enable attribute swizzling (repositioning) in the gen6 SF.
1182 - i965: Add register coalescing to the new FS backend.
1183 - i965: Split FS_OPCODE_DISCARD into two steps.
1184 - i965: Reduce register interference checks for changed
1186 - i965: Move FS backend structures to a header.
1187 - i965: Give the math opcodes information on base mrf/mrf len.
1188 - i965: Give the FB write and texture opcodes the info on base MRF,
1190 - i965: Compute to MRF in the new FS backend.
1191 - i965: Don't consider gen6 math instructions to write to MRFs.
1192 - i965: Add a couple of checks for gen6 math instruction limits.
1193 - i965: Don't compute-to-MRF in gen6 math instructions.
1194 - i965: Expand uniform args to gen6 math to full registers to get
1196 - i965: Don't compute-to-MRF in gen6 VS math.
1197 - i965: Fix gen6 pixel_[xy] setup to avoid mixing int and float src
1199 - i965: Always use the new FS backend on gen6.
1200 - i965: Fix missing "break;" in i2b/f2b, and missing AND of CMP result.
1203 - i965: Don't rebase the index buffer to min 0 if any arrays are in
1205 - i965: Add support for rescaling GL_TEXTURE_RECTANGLE coords to new
1207 - i965: Set class_sizes[] for the aligned reg pair class.
1208 - i965: Update the live interval when coalescing regs.
1209 - i965: Add a pass to the FS to split virtual GRFs to float channels.
1210 - i965: Add a function for handling the move of boolean values to flag
1212 - i965: Add peepholing of conditional mod generation from expressions.
1213 - i965: Enable the new FS backend on pre-gen6 as well.
1214 - i965: Fix texturing on pre-gen5.
1215 - i965: Set the type of the null register to fix gen6 FS comparisons.
1216 - i965: Disable the debug printf I added for FS disasm.
1217 - i965: Fix a weirdness in NOT handling.
1218 - i965: Fix assertion failure on gen6 BufferSubData to busy BO.
1219 - i965: Assert out on gen6 VS constant buffer reads that hang the GPU
1221 - i965: Fix scissor-offscreen on gen6 like we did pre-gen6.
1222 - i965: Avoid blits in BufferCopySubdata on gen6.
1223 - i965: Tell the shader compiler when we expect depth writes for gen6.
1224 - i965: Remove the gen6 emit_mi_flushes I sprinkled around the driver.
1225 - i965: Disable thread dispatch when the FS doesn't do any work.
1226 - i965: Add EU emit support for gen6's new IF instruction with
1228 - i965: Set the source operand types for gen6 if/else/endif to integer.
1229 - i965: Use the new style of IF statement with embedded comparison on
1231 - i965: Split register allocation out of the ever-growing brw_fs.cpp.
1232 - i965: Fix gl_FrontFacing emit on pre-gen6.
1233 - i965: Add support for register spilling.
1234 - i965: Don't emit register spill offsets directly into g0.
1235 - i965: Correct scratch space allocation.
1236 - i965: Be more aggressive in tracking live/dead intervals within
1238 - i965: Move the FS disasm/annotation printout to codegen time.
1239 - i965: Add support for pull constants to the new FS backend.
1240 - i965: Add EU code for dword scattered reads (constant buffer array
1242 - i965: Clarify an XXX comment in FB writes with real info.
1243 - i965: Use SENDC on the first render target write on gen6.
1244 - i965: Clear some undefined fields of g0 when using them for gen6 FB
1246 - i965: Add disasm for the flag register.
1247 - i965: Add support for discard instructions on gen6.
1248 - i965: Handle new ir_unop_round_even in channel expression splitting.
1249 - i965: Fix typo in comment about state flags.
1250 - i965: Set up the constant buffer on gen6 when it's needed.
1251 - i965: Add support for constant buffer loads on gen6.
1252 - i965: Drop the eot argument to read messages, which can never be set.
1253 - i965: Fix VS URB entry sizing.
1254 - i965: Disable register spilling on gen6 until it's fixed.
1255 - i965: Make FS uniforms be the actual type of the uniform at upload
1257 - i965: Add user clip planes support to gen6.
1258 - i965: Update gen6 SF state when point state (sprite or attenuation)
1260 - i965: Upload required gen6 VS push constants even when using pull
1262 - i965: Update the gen6 stencil ref state when stencil state changes.
1269 - i965: Remove dead intel_structs.h file.
1277 - i965: Allow OPCODE_SWZ to put immediates in the first arg.
1278 - i965: Add support for math on constants in gen6 brw_wm_glsl.c path.
1279 - i965: Work around strangeness in swizzling/masking of gen6 math.
1280 - i965: re-enable gen6 IF statements in the fragment shader.
1282 - i965: Fix gl_FragCoord inversion when drawing to an FBO.
1283 - i965: Shut up spurious gcc warning about GLSL_TYPE enums.
1286 - i965: Add state dumping for sampler state.
1287 - i965: Add dumping of the sampler default color.
1288 - i965: Fail on loops on gen6 for now until we write the EU emit code
1290 - i965: Eliminate dead code more aggressively.
1292 - i965: Fix compute_to_mrf to not move a MRF write up into another live
1294 - i965: Just use memset() to clear most members in FS constructors.
1295 - i965: Remove extra n at the end of every instruction in
1297 - i965: Fold constants into the second arg of BRW_SEL as well.
1300 - i965: Recognize saturates and turn them into a saturated mov.
1302 - i965: Improve compute-to-mrf.
1303 - i965: Remove duplicate MRF writes in the FS backend.
1304 - i965: Move gen4 blend constant color to the gen4 blending file.
1305 - i965: Don't upload polygon stipple unless required.
1306 - i965: Don't upload line stipple pattern unless we're stippling.
1307 - i965: Don't upload line smooth params unless we're line smoothing.
1308 - i965: Use the new embedded compare in SEL on gen6 for VS MIN and MAX
1310 - i965: Fix type of gl_FragData[] dereference for FB write.
1319 - i965: Dump the WHILE jump distance on gen6.
1320 - i965: Add support for gen6 DO/WHILE ISA emit.
1321 - i965: Add support for gen6 BREAK ISA emit.
1322 - i965: Add support for gen6 CONTINUE instruction emit.
1323 - i965: Enable IF statements in the VS.
1324 - i965: Add support for loops in the VS.
1331 - i965: Update gen6 WM state on compiled program change, not just FP
1333 - i965: Update gen6 SF state on fragment program change too.
1334 - i965: Fix compile warning about missing opcodes.
1335 - i965: Move payload reg setup to compile, not lookup time.
1336 - i965: Provide delta_xy reg to gen6 non-GLSL path PINTERP.
1337 - i965: Fix up 16-wide gen6 FB writes after various refactoring.
1338 - i965: Don't smash a group of coordinates doing gen6 16-wide sampler
1340 - i965: Fix gen6 interpolation setup for 16-wide.
1341 - i965: Fix up gen6 samplers for their usage by brw_wm_emit.c
1342 - i965: Make the sampler's implied move on gen6 be a raw move.
1343 - i965: Align gen6 push constant size to dispatch width.
1344 - i965: Add support for the instruction compression bits on gen6.
1345 - i965: Nuke brw_wm_glsl.c.
1346 - i965: Remove INTEL_DEBUG=glsl_force now that there's no brw_wm_glsl.c
1347 - i965: Fix comment about gen6_wm_constants.
1348 - i965: Handle saturates on gen6 math instructions.
1349 - i965: Always hand the absolute value to RSQ.
1350 - i965: Add disabled debug code for dumping out the WM constant
1352 - i965: Work around gen6 ignoring source modifiers on math
1354 - i965: Fix flipped value of the not-embedded-in-if on gen6.
1355 - i965: Don't try to store gen6 (float) blend constant color in bytes.
1356 - i965: Set up the color masking for the first drawbuffer on gen6.
1357 - i965: Set up the per-render-target blend state on gen6.
1358 - i965: Set the render target index in gen6 fixed-function/ARB_fp path.
1359 - i965: Use the new pixel mask location for gen6 ARB_fp KIL
1361 - i965: Drop KIL_NV from the ff/ARB_fp path since it was only used for
1363 - i965: Drop push-mode reladdr constant loading and always use
1365 - i965: Fix VS constants regression pre-gen6.
1366 - i965: Clean up VS constant buffer location setup.
1367 - i965: Set up the correct texture border color state struct for
1369 - i965: Set render_cache_read_write surface state bit on gen6 constant
1371 - i965: remove unused variable since brw_wm_glsl.c removal.
1377 - i965: Correct the dp_read message descriptor setup on g4x.
1380 - i965: Fix ARL to work on gen6.
1382 - i965: Fix gl_FragCoord.z setup on gen6.
1383 - i965: Add support for using the BLT ring on gen6.
1389 - i965: Avoid using float type for raw moves, to work around SNB issue.
1390 - i965: Set the alternative floating point mode on gen6 VS and WM.
1391 - i965: Add support for gen6 constant-index constant loading.
1392 - i965: Add support for gen6 reladdr VS constant loading.
1393 - i965: Improve the hacks for ARB_fp scalar^scalar POW on gen6.
1394 - i965: Factor out the ir comparision to BRW_CONDITIONAL\_\* code.
1395 - i965: Fix regression in FS comparisons on original gen4 due to gen6
1397 - i965: Do lowering of array indexing of a vector in the FS.
1551 - i965: Enable GL_ARB_texture_rg
1592 - i965: Fix indentation after commit 3322fbaf
1625 - i965: Correctly emit constants for aggregate types (array, matrix,
2033 - i965: Fix incorrect batchbuffer size in gen6 clip state command.
2034 - i965: Use logical-not when emitting ir_unop_ceil.
2037 - i965: Use RNDZ for ir_unop_trunc in the new FS.
2038 - i965: Correctly emit the RNDZ instruction.
2039 - i965: Clean up a warning in the old fragment backend.
2042 - i965: Add support for ir_unop_round_even via the RNDE instruction.
2046 - i965: Add missing "break" statement.
2049 - i965: Remove unused variable.
2060 - i965: Add bit operation support to the fragment shader backend.
2124 - i965: Flatten if-statements beyond depth 16 on pre-gen6.
2125 - i965: Internally enable GL_NV_blend_square on ES2.
2145 - i965: Don't write mrf assignment for pointsize output
2406 - dri/i965: remove duplicated include
2590 - egl/i965: include inline_wrapper_sw_helper.h
2707 - i965: Silence unused variable warning on non-debug builds.
2708 - i965: Silence unused variable warning on non-debug builds.
2709 - i965: Initialize member variables.
2745 - i965: Silence uninitialized variable warning.
2746 - i965: Silence uninitialized variable warning.
2786 - i965: Silence uninitialized variable warning.
2823 - i965: Silence uninitialized variable warning.
2840 - i965: add support for polygon mode on Sandybridge.
2841 - i965: fix for flat shading on Sandybridge
2842 - i965: set minimum/maximum Point Width on Sandybridge
2844 - i965: support for two-sided lighting on Sandybridge
2845 - i965: fix register region description
2846 - i965: use align1 access mode for instructions with execSize=1 in VS
2847 - i965: don't spawn GS thread for LINELOOP on Sandybridge
2848 - i965: use BLT to clear buffer if possible on Sandybridge
2863 - i965: disasm quarter and write enable instruction control on
2865 - i965: new state dump for sandybridge
2866 - i965: enable accumulator update in PS kernel too on sandybridge
2867 - i965: Fix color interpolation on sandybridge
2868 - i965: force zero in clipper to ignore RTAIndex on sandybridge
2869 - i965: fix point size setting in header on sandybridge
2870 - i965: ff sync message change for sandybridge
2871 - i965: ignore quads for GS kernel on sandybridge
2872 - i965: add sandybridge viewport state bo into validation list
2873 - i965: VS use SPF mode on sandybridge for now
2874 - i965: fix jump count on sandybridge
2875 - i965: Fix sampler on sandybridge
2876 - i965: fix const register count for sandybridge
2877 - i965: Add all device ids for sandybridge
2878 - i965: sandybridge pipe control workaround before write cache flush
2879 - i965: only allow SIMD8 kernel on sandybridge now
2880 - i965: don't do calculation for delta_xy on sandybridge
2881 - i965: fix pixel w interpolation on sandybridge
2882 - i965: enable polygon offset on sandybridge
2883 - i965: fix scissor state on sandybridge
2884 - i965: fix point sprite on sandybridge
2885 - i965: fix occlusion query on sandybridge
2886 - i965: fallback bitmap operation on sandybridge
2887 - i965: Always set tiling for depth buffer on sandybridge
2888 - i965: fallback lineloop on sandybridge for now
2889 - Revert "i965: Always set tiling for depth buffer on sandybridge"
2890 - i965: always set tiling for fbo depth buffer on sandybridge
2891 - i965: Fix GS hang on Sandybridge
2892 - Revert "i965: fallback lineloop on sandybridge for now"
2893 - i965: refresh wm push constant also for BRW_NEW_FRAMENT_PROGRAM on
2895 - i965: fix dest type of 'endif' on sandybridge
2896 - Revert "i965: VS use SPF mode on sandybridge for now"
2897 - i965: also using align1 mode for math2 on sandybridge
2898 - i965: Fix GS state uploading on Sandybridge
2899 - i965: upload WM state for \_NEW_POLYGON on sandybridge
2900 - i965: Use MI_FLUSH_DW for blt ring flush on sandybridge
2901 - i965: explicit tell header present for fb write on sandybridge
2902 - i965: Fix occlusion query on sandybridge
2903 - i965: Use last vertex convention for quad provoking vertex on
2905 - i965: Fix provoking vertex select in clip state for sandybridge
2909 - i965: skip too small size mipmap