Lines Matching full:ir3
735 - ir3: Add scan_clusters_macro to ir3_valid_flags()
736 - ir3: Add scan_clusters.macro to is_subgroup_cond_mov_macro()
737 - ir3: Validate tied sources better
738 - ir3/ra: Don't demote movmsk instructions to non-shared
739 - ir3: Rewrite postsched dependency handling
740 - ir3/legalize: Use define for register size
741 - ir3: Rewrite regmask implementation
742 - ir3/ra: Prepare for shared half-regs
743 - ir3/ra: Fix printing shared reg file
744 - ir3/ra: Prepare for shared phis
745 - ir3: Fix lowering shared parallel copies with immed src
746 - ir3/lower_pcopy: Fix immed/const flags for copy from shared
747 - ir3: Fix shared parallel copy validation
748 - ir3: Don't use swz with shared registers
749 - ir3/lower_copies: Handle HW bug with shared half-floats
750 - ir3/lower_copies: Fix "inaccessible" half reg lowering with shared regs
751 - ir3/ra: Use ra_reg_get_num() for validating num
752 - ir3: Use INVALID_REG in array store
753 - ir3: Reset num when creating parallel copies
754 - ir3: Validate that shared registers are in-bound
755 - ir3: Allow propagation of normal->shared copies
756 - ir3: Moves with shared destination are always legal
757 - ir3/legalize: Take (ss) into account in WaR hazards
758 - ir3/legalize: Remove bad (eq) micro-optimization
759 - ir3/legalize: any/all/getone are non-prefetch helper users
760 - ir3: Use correct category for OPC_PUSH_CONSTS_LOAD_MACRO
761 - ir3: Add support for "scalar ALU"
762 - ir3: Implement source restrictions for shared ALU
763 - ir3: Validate scalar ALU sources
764 - ir3: Immediate source for stc is invalid
765 - ir3: Don't emit single-source collects
766 - ir3/cp: Support swapping mad srcs for shared regs
767 - ir3/cf: Don't fold shared conversions
768 - ir3: Distinguish lowered shared->normal moves
769 - ir3: Add support for ldc.u
770 - ir3: Add builder support for shared immediates
771 - ir3: Create reduce identity directly
772 - ir3: Make type_flags() return a bitmask enum
773 - ir3: Support scalar ALU in the builder
774 - ir3: Add scalar ALU-specific passes
775 - ir3: Get sources before emitting scan_clusters.macro
776 - ir3: Rewrite shared reg handling when translating from NIR
777 - ir3: Directly use shared registers when possible
778 - ir3/nir: Fix imadsh_mix16 definition
779 - ir3: Use scalar ALU instructions when possible
780 - ir3: Don't scalarize all SSBO instructions
781 - ir3: Don't manually scalarize SSBO loads
787 - ir3: Put VS->TCS barrier after preamble
788 - ir3/legalize: Insert dummy bary.f after preamble
789 - freedreno,ir3: Add has_early_preamble
792 - ir3: Add ir3_info::early_preamble
795 - ir3: Enable early preamble
803 - ir3: Make sure constlen includes stc/ldc.k/ldg.k instructions
805 - ir3, tu, freedreno: Move early_preamble to ir3_shader
807 - ir3: Introduce elect_any_ir3
808 - ir3: Use elect_any_ir3 in preambles
811 - ir3: Fix UBO size with indirect driver params
818 - ir3: Fix stg/ldg immediate offset on a7xx
821 - ir3: Split out bindless tex/samp encoding
822 - ir3: Don't consider r63.x as a GPR
823 - ir3: Plumb through descriptor prefetch intrinsics
824 - ir3: Make preamble rematerialization common code
825 - ir3: Expand preamble rematerialization
826 - ir3: Add descriptor prefetching optimization on a7xx
980 - ir3/a7xx: Fix FS consts corruption when other FS has zero constlen
986 - freedreno/ir3: mova has special meaning for (r) flag
987 - ir3: Correctly assemble mova1 with (r) on const
998 - ir3: Print bindless samp/tex ids for tex prefetch
999 - ir3/tests: Make possible to specify raw instr value as uint64
1000 - ir3/tests: Make possible to add generated disasm tests
1001 - ir3: Fix decoding of stib.b/ldib.b with offset
1684 - ir3: Use spirv_capabilities in ir3_cmdline
2336 - ir3: simplify cat5 parsing
2337 - ir3: add encoding for isam.v
2338 - ir3: use isam.v for multi-component SSBO loads
2339 - ir3: add encoding of ldib/stib offsets
2340 - ir3: lower SSBO access imm offsets
2344 - ir3: use nir_opt_offsets for SSBO accesses
2345 - ir3: optimize SSBO offset shifts for nir_opt_offsets
2346 - ir3: remove spilled splits in shared RA
2347 - ir3: set wrmask for spilled splits in shared RA
2348 - ir3: print sharedness/halfness of merge set regs
2349 - ir3: print intervals when dumping merge sets
2350 - ir3: print dst_offset of spill.macro
2351 - ir3: debug print limit pressure and post-spill max pressure
2352 - ir3: set current instruction before all validation asserts
2353 - ir3: fix crash in try_evict_regs with src reg
2354 - ir3: fix handling of early clobbers in calc_min_limit_pressure
2355 - ir3: set offset on splits created while spilling
2356 - ir3: correctly set wrmask for reload.macro
2357 - ir3: don't remove intervals for non-killed tex prefetch sources
2358 - ir3: don't remove collects early while spilling
2359 - ir3: expose instruction indexing helper for merge sets
2360 - ir3: make indexing instructions optional in ir3_merge_regs
2361 - ir3: index instructions before fixing up merge sets after spilling
2362 - ir3: move liveness recalculation inside ir3_ra_shared
2363 - ir3: restore interval_offset after liveness recalculation in shared RA
2364 - ir3: add ir3_cursor/ir3_builder helpers
2365 - ir3: refactor ir3_spill.c to use the ir3_cursor/ir3_builder API
2366 - ir3: only add live-in phis for top-level intervals while spilling
2367 - ir3: print rounding mode for cov
2368 - ir3: set rounding mode for all floating point conversions
2600 - ir3: Don't set saturation on \`flat.b`
3560 - ir3: flag progress from nir_lower_io_to_scalar
3561 - ir3: assert that no further optimizations can be done if !progress
3940 - freedreno/ir3: Skip DAG validation on release builds
3957 - freedreno/ir3: Fix ldg/stg offset
3968 - ir3: Add some more missing progress accumulation
4720 - freedreno,tu,ir3: Move threadsize_base and max_waves to fd_dev_info
4845 - ir3: rework TYPE_S8 as TYPE_U8_32