Lines Matching full:brw

107 - intel/brw: scoreboarding regression
616 - intel/brw: Don't print IP as part of the dump
617 - intel/brw: Hide register pressure information in dumps
618 - intel/brw: Use \`vNN` instead of \`vgrfNN` when printing instructions
619 - intel/brw: Fix commas when dumping instructions
621 - intel/brw: Track the number of uses of each def in def_analysis
622 - intel/brw: Fix typo in DPAS emission code
623 - intel/brw: Add unit tests for scoreboard handling FIXED_GRF with stride
624 - intel/brw: Make component_size() consistent between VGRF and FIXED_GRF
626 - intel/brw: Print SWSB information when dumping instructions
627 - intel/brw: Reorganize lowering of LocalID/Index to handle Mesh/Task
629 - intel/brw: Remove unused brw_reg related functions
630 - intel/brw: Remove RALLOC helper from fs_reg
631 - intel/brw: Remove unused variable from test
632 - intel/brw: Move fs_reg data members up to brw_reg
633 - intel/brw: Use public inheritance for fs_reg/brw_reg
634 - intel/brw: Move most member functions from fs_reg to brw_reg
635 - intel/brw: Remove conversion from fs_reg to brw_reg
636 - intel/brw: Replace some fs_reg constructors with functions
637 - intel/brw: Remove duplicated functions between fs_reg/brw_reg
638 - intel/brw: Rename brw_reg() helper to brw_make_reg()
639 - intel/brw: Make fs_reg an alias of brw_reg
640 - intel/brw: Replace uses of fs_reg with brw_reg
641 - intel/brw: Rename fs_reg_* helpers to brw_reg_*
642 - intel/brw: Move brw_reg helpers into brw_reg.h
643 - intel/brw: Don't set acc_wr_control for Xe2
644 - intel/brw: Use brw_inst_set_group() to set QtrCtrl and NibCtrl
645 - intel/brw: Account for reg_unit() in assembler
646 - intel/brw: Don't print extra newlines in assembler
647 - intel/brw: Split off assembler logic into library
649 - intel/brw: Convert missing uses of ralloc to linear in fs_live_variables
1954 - intel/brw/xe2+: Keep PS sample mask in the f1.0 register whether or not kill is used.
1955 - intel/brw: Don't emit Z coordinate interpolation if CPS isn't in use.
1956 - intel/brw/xe2+: Fix indirect extended descriptor setup for scratch space.
1959 - intel/brw/xe2+: Don't use SEL peephole on 64-bit moves.
1960 - intel/brw/xe2+: Fix 64-bit subgroup scan intrinsics not to rely on SEL instructions.
1961 - intel/brw/xe2+: Lower 64-bit SHUFFLE and CLUSTER_BROADCAST.
1964 - intel/brw/xe2+: Lower 64-bit integer uadd_sat.
1965 - intel/brw/xe2+: Round up spill/unspill data size to nearest reg_size multiple.
1970 - intel/brw/xe2+: Use active-thread-only barriers available since Xe2+.
1982 - intel/brw: Implement null push constant workaround.
2185 - intel/brw: Fix optimize_extract_to_float for i2f of unsigned extract
2186 - intel/brw: Avoid optimize_extract_to_float when it will just be undone later
2190 - intel/brw: Remove dsign optimization
2192 - intel/brw: Use fs_inst::resize_sources in brw_fs_opt_algebraic
2193 - intel/brw: Add support for fcsel opcodes
2194 - intel/brw: Handle fsign optimization in a NIR algebraic pass
2195 - intel/brw: Update CSEL source type validation
2196 - intel/brw: Combine constants and constant propagation for CSEL
2197 - intel/brw: Algebraic optimizations for CSEL
2198 - intel/brw: Implement more strictly correct fsign lowering
2199 - intel/brw: Use range analysis to optimize fsign
2205 - intel/brw: Temporarily disable result=float16 matrix configs
2206 - intel/brw: Major rework of lower_cmat_load_store
2207 - intel/brw/xe2+: Catch invalid uses of writes_accumulator earlier
2208 - intel/brw/xe2+: Adjust size_read() for DPAS
2209 - intel/brw/xe2+: Scale size_written by reg_unit for DPAS
2210 - intel/brw/xe2+: Adjust DPAS lowering to DP4A to accommodate larger GRF and SIMD16
2211 - intel/brw/xe2+: Allow vec16 for cooperative matrix
2213 - intel/brw/xe2+: Add LNL cooperative matrix configurations
2215 - intel/brw: Test corner case CSE of ADD3 instructions
2216 - intel/brw: Don't propagate saturate to an instruction that writes flags
2246 - intel/brw: fix subgroup size of geometry stages for lnl+
2248 - intel/brw: add fetch_viewport_index function
2249 - intel/brw: always read LAYER/VIEWPORT from the FS payload
2381 - intel/brw: Simplify enabling brw_fs_test_dispatch_packing
2382 - intel/brw: Allow xe2 in brw_stage_has_packed_dispatch()
2383 - intel/brw: Fix SSBO/shared load offset register size for Xe2
2397 - intel/brw: Retype some regs to BRW_TYPE_UD for Xe2 indirect accesses
2402 - intel/brw/validate: Simplify grf span validation check by not using a mask
2403 - intel/brw/validate: Update dst grf crossing check for Xe2
2404 - intel/brw/validate: Convert access mask to be grf based
2772 - intel/brw: Delete gfx10 table for align1 3src type encoding
2773 - intel/brw: Drop NF type support
2774 - intel/brw: Rework BRW_REGISTER_TYPE's representation semantics
2775 - intel/brw: Stop using long BRW_REGISTER_TYPE enum names
2776 - intel/brw: Reindent after shortening BRW_REGISTER_TYPE_* to BRW_TYPE_*
2777 - intel/brw: Use newer brw_type_is_* shorter names
2778 - intel/brw: Replace brw_reg_type_from_bit_size by brw_type_with_size
2779 - intel/brw: Replace type_sz and brw_reg_type_to_size with brw_type_size_*
2780 - intel/brw: Combine a1/a16 3src type encoding functions
2781 - intel/brw: Combine a1/a16 3src type decoding functions
2782 - intel/brw: Rename brw_reg_type_to_hw_type to brw_type_encode
2783 - intel/brw: Don't use inst return value when it isn't needed
2784 - intel/brw: Make a helper for finding the largest of two types
2785 - intel/brw: Add builder helpers for math functions
2786 - intel/brw: Add builder helpers that allocate temporary destinations
2787 - intel/brw: Use new builder helpers that allocate a VGRF destination
2788 - intel/brw: Print W/UW immediates correctly
2789 - intel/brw: Do not create empty basic blocks when removing instructions
2790 - intel/brw: Support CSE on more ops
2791 - intel/brw: Don't include unnecessary undefined values in texture results
2792 - intel/brw: Add a new VEC() helper.
2793 - intel/brw: Use VEC for load_const
2794 - intel/brw: Use VEC for gl_FragCoord
2795 - intel/brw: Use VEC for TCS/TES/GS input/output loads
2796 - intel/brw: Use VEC for FS outputs
2797 - intel/brw: Use VEC for output stores
2798 - intel/brw: Use VEC for NIR vec*() sources
2799 - intel/brw: Use VEC for emit_unzip()
2801 - intel/brw: Blockify convergent load_shared on Gfx11-12 as well
2802 - intel/brw: Recreate GS output registers after EmitVertex
2803 - intel/brw: Skip fs_nir_setup_outputs for compute shaders
2804 - intel/brw: Handle scratch address swizzling of constants
2805 - intel/brw: Add a idom_tree::dominates(a, b) helper.
2806 - intel/brw: Make brw_reg::bits publicly accessible from fs_reg
2807 - intel/brw: Update instructions_match() to compare more fields
2808 - intel/brw: Drop compiler parameter from try_constant_propagate()
2809 - intel/brw: Drop BRW_OPCODE_IF from try_constant_propagate
2810 - intel/brw: Refactor try_constant_propagate()
2811 - intel/brw: Refactor code to commute immediates into legal positions
2812 - intel/brw: Delete SAD2 and SADA2 opcodes
2813 - intel/brw: Make VEC() perform a single write to its destination.
2814 - intel/brw: Make gl_SubgroupInvocation lane index loading SSA
2815 - intel/brw: Skip LOAD_PAYLOADs after every texture instruction if possible
2816 - intel/brw: Add a new def analysis pass
2817 - intel/brw: Print defs in dump_instructions
2818 - intel/brw: Write a new global CSE pass that works on defs
2819 - intel/brw: Switch to the new defs-based global CSE pass
2820 - intel/brw: Delete old local common subexpression elimination pass
2821 - intel/brw: Introduce a new SSA-based copy propagation pass
2822 - intel/brw: Use the defs-based copy propagation along with the old one
2823 - intel/brw: Make opt_copy_propagation_defs clean up its own trash
2824 - intel/brw: Build the scratch header on the fly for pre-LSC systems
2825 - intel/brw: Skip discarding the interference graph
2826 - intel/brw: Delay liveness calculations in saturate propagation
2827 - intel/brw: Make an alu2 builder helper
2828 - intel/brw: Make bld.ADD(x, 0) emit no instructions and return x directly
2829 - intel/brw: Support CSE of ADD3
2830 - intel/brw: Add a lower_csel pass and allow building it for all types
2832 - intel/brw: Don't mix types for unary extended math instructions
2833 - intel/brw: Disallow scalar byte to float conversions on DG2+
2931 - intel/brw: fixup wm_prog_data_barycentric_modes()
2933 - intel/brw: add min_sample_shading value in wm_prog_data
2953 - brw: add more condition for reducing sampler simdness
2955 - brw: drop dependency on libintel_common
2971 - intel/brw: ensure find_live_channel don't access arch register without sync
2978 - brw: use a single virtual opcode to read ARF registers
2979 - brw: limit dependencies on SR register
2980 - brw: better model READ_ARF_REG opcode
3018 - brw: add missing break
3019 - brw: factor out source extraction for rematerialization
3020 - brw: improve rematalization of surface/sampler handles
3021 - brw: bound the amount of rematerialized NIR instructions
3022 - brw: remove rematerialization assert
3023 - brw: remove some brackets
3024 - brw: enable rematerialization of non 32bit uniforms
3025 - brw: always use new registers for load address increments
3026 - brw: annotation send instructions with surface handles generated with exec_all
3027 - brw: avoid Wa_1407528679 in uniform cases
3028 - brw: blockify load_global_const_block_intel
3029 - brw: enable A64 loads source rematerialization
3040 - brw: fix uniform rebuild of sources
3050 - brw/rt: fix ray_object_(direction|origin) for closest-hit shaders
3436 - intel/brw: Use REG_CLASS_COUNT
4012 - intel/brw: update Xe2 max SIMD message sizes
4015 - intel/brw: Advertise fp64 atomic add's when we have 64 bit float support and a LSC
4016 - intel/brw: We no longer have atomic fmin/fmax ops for fp64 in xe2
4056 - intel/brw: allocate large table in the heap instead of the stack
4565 - intel/brw: Actually retype integer sources of sampler message payload
4825 - intel/brw: update comment to accurately reflect intended behavior
4826 - intel/brw: update Wa_1805992985 to use workarounds mechanism