Lines Matching full:brw
947 - intel/compiler: Merge intel_disasm.[ch] into corresponding brw files
950 - intel/blorp: Remove brw\_ prefix when not applicable
956 - intel/blorp: Avoid brw types in blorp_priv.h
964 - intel: Remove brw\_ prefix from process debug function
996 - intel/blorp: Move brw specific code to a separate file
1003 - iris: Rename screen->compiler to screen->brw
1010 - intel: Use _brw suffix for genX headers that rely on brw
1017 - intel/brw: Remove assembler tests for Gfx8-
1018 - intel/brw: Remove EU compaction tests for Gfx8-
1019 - intel/brw: Remove EU validation tests for Gfx8-
1020 - intel/brw: Remove pass test cases for Gfx8-
1021 - intel/brw: Assert Gfx9+
1023 - intel/brw: Remove Gfx8- passes from optimize()
1024 - intel/brw: Pull opt_copy_propagation out of fs_visitor
1025 - intel/brw: Pull opt_cmod_propagation out of fs_visitor
1026 - intel/brw: Pull opt_saturate_propagation out of fs_visitor
1027 - intel/brw: Pull dead_code_eliminate out of fs_visitor
1028 - intel/brw: Pull opt_combine_constants out of fs_visitor
1029 - intel/brw: Pull opt_cse out of fs_visitor
1030 - intel/brw: Pull bank_conflicts out of fs_visitor
1031 - intel/brw: Pull peephole_sel out of fs_visitor
1032 - intel/brw: Pull redundant_halt out of fs_visitor
1033 - intel/brw: Pull opt_algebraic out of fs_visitor
1034 - intel/brw: Pull split/compact virtual_grf opts out of fs_visitor
1035 - intel/brw: Pull opt_split_sends out of fs_visitor
1036 - intel/brw: Pull opt_zero_samples out of fs_visitor
1037 - intel/brw: Pull eliminate_find_live_channel out of fs_visitor
1038 - intel/brw: Pull remove_extra_rounding_modes out of fs_visitor
1039 - intel/brw: Pull register_coalesce out of fs_visitor
1040 - intel/brw: Pull lower_constant_loads out of fs_visitor
1041 - intel/brw: Pull lower_pack out of fs_visitor
1042 - intel/brw: Pull lower_simd_width out of fs_visitor
1043 - intel/brw: Pull lower_barycentrics out of fs_visitor
1044 - intel/brw: Pull lower_logical_sends out of fs_visitor
1045 - intel/brw: Pull fixup_nomask_control_flow out of fs_visitor
1046 - intel/brw: Pull lower_integer_multiplication out of fs_visitor
1047 - intel/brw: Pull lower_sub_sat out of fs_visitor
1048 - intel/brw: Pull lower_derivatives out of fs_visitor
1049 - intel/brw: Pull lower_regioning out of fs_visitor
1050 - intel/brw: Pull fixup_sends_duplicate_payload out of fs_visitor
1051 - intel/brw: Pull lower_uniform_pull_constant_loads out of fs_visitor
1052 - intel/brw: Pull lower_find_live_channel out of fs_visitor
1053 - intel/brw: Pull lower_load_payload out of fs_visitor
1054 - intel/brw: Use references for a couple of backend_shader passes
1055 - intel/brw: Simplify OPT macro usage in fs_visitor::optimize
1056 - intel/brw: Pull fixup_3src_null_dest out of fs_visitor
1057 - intel/brw: Pull emit_dummy_memory_fence_before_eot out of fs_visitor
1058 - intel/brw: Pull emit_dummy_mov_instruction out of fs_visitor
1059 - intel/brw: Pull lower_scoreboard out of fs_visitor
1060 - intel/brw: Pull optimize() out of fs_visitor
1061 - intel/brw: Move optimize and small optimizations to brw_fs_opt.cpp
1062 - intel/brw: Move virtual GRF opts into their own file
1063 - intel/brw: Move fs algebraic to its own file
1064 - intel/brw: Move small lowering passes into brw_fs_lower.cpp
1065 - intel/brw: Move lower_integer_multiplication to its own file
1066 - intel/brw: Expose flag_mask/bit_mask fs helpers
1067 - intel/brw: Move lower_simd_width to its own file
1068 - intel/brw: Move workarounds to a separate file
1069 - intel/blorp: Remove Gfx8- references in BRW code
1070 - intel/brw: Move brw_compile_* functions out of vec4-specific files
1071 - intel/brw: Move type_size_* functions out of vec4-specific file
1072 - intel/brw: Always use scalar shaders
1073 - intel/brw: Remove vec4 backend
1074 - intel/brw: Remove now unused vec4-only opcodes
1075 - intel/brw: Remove unused legacy shader stages
1076 - intel/brw: Remove Gfx8- code from disassembler
1077 - intel/brw: Remove Gfx8- code from assembler
1078 - intel/brw: Remove Gfx8- code from brw_compile_* functions
1079 - intel/brw: Remove Gfx8- code from scheduler
1080 - intel/brw: Remove Gfx8- code from register allocator
1081 - intel/brw: Remove Gfx8- code from thread payload
1082 - intel/brw: Remove Gfx8- code from NIR conversion
1083 - intel/brw: Remove Gfx8- code from lower storage image pass
1084 - intel/brw: Remove Gfx8- code from lower logical sends
1085 - intel/brw: Remove Gfx8- code from generator
1086 - intel/brw: Remove Gfx8- code from backend passes
1087 - intel/brw: Remove Gfx8- code from EU compaction
1088 - intel/brw: Remove Gfx8- code from IR performance analysis
1089 - intel/brw: Remove Gfx8- code from EU emission
1090 - intel/brw: Remove Gfx8- code from EU validation
1091 - intel/brw: Remove Gfx8- code from NIR passes
1092 - intel/brw: Remove Gfx4-5 manual compression selection
1093 - intel/brw: Remove Gfx8- code from EU codegen helpers
1094 - intel/brw: Remove Gfx8- code from NIR options
1095 - intel/brw: Remove Gfx8- code from register type helpers
1096 - intel/brw: Remove Gfx8- specific EU inst helpers
1097 - intel/brw: Remove Gfx8- code from inst FC and F macros
1098 - intel/brw: Replace inst F8 macro with F macro
1099 - intel/brw: Remove Gfx8- code from inst F20 macros
1100 - intel/brw: Remove Gfx8- code from inst FD20 and FV20 macros
1101 - intel/brw: Remove Gfx8- code from inst FI macros
1102 - intel/brw: Remove Gfx8- code from inst BRW_IA*_ADDR_IMM macros
1103 - intel/brw: Remove Gfx8- code from inst FFDC, FDC and FD macros
1104 - intel/brw: Update comments for FK macro
1105 - intel/brw: Replace inst FF macro with F or F20 macros
1106 - intel/brw: Remove F16TO32 and F32TO16 opcodes
1107 - intel/brw: Remove Gfx8- code from builder
1108 - intel/brw: Remove Gfx8- code from fs_inst
1109 - intel/brw: Remove Gfx8- code from VUE map
1110 - intel/brw: Remove Gfx8- code from SIMD lowering
1111 - intel/brw: Remove Gfx8- code from visitor
1112 - intel/brw: Remove Gfx8- remaining opcodes
1113 - intel/brw: Remove MRF type
1114 - intel/brw: Inline brw_nir_apply_sampler_key code
1115 - intel/brw: Remove unused attrib workarounds
1116 - intel/brw: Remove edgeflag_is_last VS parameter
1117 - intel/brw: Remove Gfx8- fields from \*_prog_key structs
1118 - intel/brw: Remove Gfx8- fields from \*_prog_data structs
1119 - intel/brw: Use a single register set
1120 - intel/brw: Remove runtime_check_aads_emit
1121 - intel/brw: Remove automatic_exec_sizes
1122 - intel/brw: Use fs_visitor instead of backend_shader in various passes
1123 - intel/brw: Fold fs_instruction_scheduler into instruction_scheduler
1124 - intel/brw: Change cfg_t to refer to fs_visitor
1125 - intel/brw: Move dump_* functions into fs_visitor
1126 - intel/brw: Fold backend_shader into fs_visitor
1127 - intel/brw: Remove extra stage_prog_data field in fs_visitor
1128 - intel/brw: Remove brw_shader.h
1129 - intel/meson: Add dependencies for brw and elk
1131 - intel/brw: Use C++ for brw_disasm_info.c
1132 - intel/brw: Hide the definition of cfg_t et al from C code
1133 - intel/brw: Use fs_inst in cfg_t
1134 - intel/brw: Use fs_inst explicitly in various passes
1135 - intel/brw: Use fs_inst in disasm_annotate()
1136 - intel/brw: Move functions from backend_instruction into fs_inst
1137 - intel/brw: Fold backend_instruction into fs_inst
1138 - intel/brw: Remove typedefs from fs_builder
1139 - intel/brw: Fold backend_reg into fs_reg
1140 - intel/brw: Simplify usage of reg immediate helpers
1180 - intel/brw: Use hstride instead of stride for accumulator
1181 - intel/brw: Use helper to create accumulator register
1182 - intel/brw: Fix validation of accumulator register
1185 - intel/brw: Implement quad_vote_any and quad_vote_all
1186 - intel/brw: Use predicates for quad_vote_any and quad_vote_all when available
1188 - intel/brw: Handle Xe2 in brw_fs_opt_zero_samples
1189 - intel/brw: Remove vestiges of sources on IF opcode, only valid on Gfx6
1190 - intel/brw: Add a src array for the common case in fs_inst
1191 - intel/brw: Refactor FS validation macros
1192 - intel/brw: Remove two duplicated validate calls in optimizer
1193 - intel/brw: Move validate out of fs_visitor
1194 - intel/brw: Support FIXED_GRF when generating code for CLUSTER_BROADCAST
1195 - intel/brw: Lower VGRFs to FIXED_GRFs earlier
1811 - intel/brw: track last successful pass and leave the loop early
2501 - intel/brw/xe2: Render target reads have been removed from the hardware.
2502 - intel/brw/xe2+: Update encoding of FB write descriptor message control.
2503 - intel/brw/xe2+: Update encoding of FB write extended descriptor.
2504 - intel/brw/xe2+: Double allowed SIMD width of FB write SEND messages.
2505 - intel/brw/xe2+: Allow FS stencil output in SIMD16 dispatch mode.
2506 - intel/brw/xe2+: Allow dual-source blending in SIMD16 mode.
2508 - intel/brw/gfx12: Setup PS thread payload registers required for ALU-based pixel interpolation.
2509 - intel/brw/xe2+: Setup PS thread payload registers required for ALU-based pixel interpolation.
2511 - intel/brw/xehp+: Replace lsc_msg_desc_dest_len()/lsc_msg_desc_src0_len() with helpers to do the c…
2513 - intel/brw/xehp+: Drop redundant arguments of lsc_msg_desc*().
2872 - intel/brw: Silence "statement may fall through" warning
2873 - intel/brw: Correctly dump subnr for FIXED_GRF in INTEL_DEBUG=optimizer
2875 - intel/brw: Integer multiply w/ DW and W sources is not commutative
2876 - intel/brw: Combine constants for src0 of integer multiply too
2877 - intel/brw: Combine constants for src0 of POW instructions too
2878 - intel/brw: Avoid a silly add with zero in assign_curb_setup
2880 - intel/brw/xe2: Correctly disassemble RT write subtypes
2881 - intel/brw: Fix handling of accumulator register numbers
2882 - intel/brw: Allow SIMD16 F and HF type conversion moves
2883 - intel/brw: Remove last vestiges of could_coissue
2884 - intel/brw: Clear write_accumulator flag when changing the destination
2885 - intel/brw: Use enums for DPAS source regioning
2886 - nir: intel/brw: Change the order of sources for nir_dpas_intel
2887 - intel/brw/xe2+: DPAS must be SIMD16 now
2888 - intel/brw/xe2+: Use phys_nr and phys_subnr in DPAS encoding
2889 - intel/brw/xe2: Update brw_nir_analyze_ubo_ranges to account for 512b physical registers
2890 - intel/brw/xe2: Update uniform handling to account for 512b physical registers
2892 - intel/brw: Don't call nir_opt_remove_phis before nir_convert_from_ssa
2894 - intel/brw: Delete stray nir_opt_dce
2896 - intel/brw/xe2+: Implement Wa 22016140776
2897 - intel/brw/xe2+: Only apply Wa 22016140776 to math instructions
2898 - intel/brw: Fix handling of cmat_signed_mask
2899 - nir: intel/brw: Remove cmat_signed_mask from dpas_intel intrinsic
2900 - intel/brw: Fix optimize_extract_to_float for i2f of unsigned extract
3139 - intel/brw: Avoid getting a stride of 0 for nir_intrinsic_exclusive_scan
3486 - intel/brw: Delete enum brw_urb_write_flags
3487 - intel/brw: Delete more unused defines
3488 - intel/brw: Delete legacy SFIDs
3489 - intel/brw: Delete SIMD4x2 URB opcodes
3490 - intel/brw: Delete more unused compression stuff
3491 - intel/brw: Delete SINCOS
3492 - intel/brw: Delete constant_buffer_0_is_relative
3493 - intel/brw: Delete compiler->supports_shader_constants
3494 - intel/brw: Delete enum gfx6_gather_sampler_wa
3495 - intel/brw: Delete brw_wm_prog_key::line_aa
3496 - intel/brw: Delete unnecessary brw_wm_prog_data fields
3497 - intel/brw: Delete some swizzling functions
3498 - intel/brw: Delete brw_eu_util.c
3499 - intel/brw: Change unit tests to use TEX_LOGICAL instead of TEX
3500 - intel/brw: Delete SHADER_OPCODE_TXF_CMS[_LOGICAL]
3501 - intel/brw: Delete SHADER_OPCODE_TXF_UMS
3502 - intel/brw: Allow CSE on TXF_CMS_W_GFX12_LOGICAL
3503 - intel/brw: Delete legacy texture opcodes
3504 - intel/brw: Mark FIND[_LAST]_LIVE_CHANNEL as not writing the flag
3505 - intel/brw: Replace CS_OPCODE_CS_TERMINATE with SHADER_OPCODE_SEND
3506 - intel/brw: Avoid copy propagating any fixed registers into EOTs
3507 - intel/brw: Handle SHADER_OPCODE_SEND without src[3] in copy prop
3508 - intel/brw: Add assertions that EOT messages live in g112+
3509 - intel/brw: Copy the smaller payload in fixup_sends_duplicate_payload
3510 - intel/brw: Make register coalescing obey the g112-g127 restriction
3511 - intel/brw: Call constant combining after copy propagation/algebraic
3512 - intel/brw: Remove SIMD lowering to a larger SIMD size
3513 - intel/brw: Unindent code after previous change
3515 - intel/brw: Emit better code for read_invocation(x, constant)
3520 - intel/brw: Split out 64-bit lowering from algebraic optimizations
3521 - intel/brw: Don't consider UNIFORM_PULL_CONSTANT_LOAD a send-from-GRF
3522 - intel/brw: Eliminate top-level FIND_LIVE_CHANNEL & BROADCAST once
3523 - intel/brw: Fix check for 64-bit SEL lowering types
3524 - intel/brw: Assert that min/max are not happening in 64-bit SEL lowering
3525 - intel/brw: Use correct execution pipe for lowering SEL on DF
3526 - intel/brw: Unify DF and Q/UQ lowering for MOV
3527 - Revert "intel/brw: Don't consider UNIFORM_PULL_CONSTANT_LOAD a send-from-GRF"
3528 - intel/brw: Fix opt_split_sends() to allow for FIXED_GRF send sources
3529 - intel/brw: Fix register coalescing's LOAD_PAYLOAD dst offset handling
3530 - intel/brw: Fix destination stride assertion in copy propagation
3531 - intel/brw: Allow changing types for LOAD_PAYLOAD with 1 source
3532 - intel/brw: Delete brw_fs_lower_minmax
3536 - intel/brw: Stop checking mlen on math opcodes in CSE pass
3537 - intel/brw: Rearrange fs_inst fields
3538 - intel/brw: Fix generate_mov_indirect to check has_64bit_int not float
3539 - intel/brw: Fix lower_regioning for BROADCAST, MOV_INDIRECT on Q types
3540 - intel/brw: Update comments for indirect MOV splitting
3541 - intel/brw: Don't mention gfx7 limitations in shuffle comments
3542 - intel/brw: Drop dead CHV checks.
3543 - intel/brw: Drop align16 support in brw_broadcast()
3544 - intel/brw: Drop gfx7 scratch message setup code
3545 - intel/brw: Delete if_depth_in_loop
3546 - intel/brw: Delete fs_visitor::vgrf helper
3547 - intel/brw: Drop default size of 1 from bld.vgrf() calls
3548 - intel/brw: Use SHADER_OPCODE_SEND for coherent framebuffer reads
3549 - intel/brw: Replace FS_OPCODE_LINTERP with BRW_OPCODE_PLN
3550 - intel/brw: Make an fs_builder::SYNC helper
3873 - intel/brw: fixup wm_prog_data_barycentric_modes()
3877 - brw: add more condition for reducing sampler simdness
4649 - brw/lower_a2c: fix for scalarized fs outputs
5059 - intel/brw: Use the dimensions supplied in the instruction
5060 - intel/brw: Cleanup send generation
5061 - intel/brw: Update written size depending on the LSC message
5062 - intel/brw: Set the right cache control bits for xe2
5063 - intel/brw: Adjust src1 length bits for xe2+
5067 - intel/brw: account for sources when determining if a operation uses half floats
5068 - intel/brw: Xe2+ can do SIMD16 for extended math on HF types
5069 - intel/brw: update disassembly for MATH pipe
5070 - intel/brw: adjust the copy propgation pass to account for wider GRF's on Xe2+
5071 - intel/brw: minor rework to de duplicate variable assignment
5072 - intel/brw: Handle typed surface and atomic messages for xe2+
5073 - intel/brw: Lower DWORD scattered read writes to lsc