Lines Matching full:old

17    %old = atomicrmw add i8* @var8, i8 %offset seq_cst
23 ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
26 ; CHECK-NEXT: add [[NEW:w[0-9]+]], w[[OLD]], w0
31 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
32    ret i8 %old
37    %old = atomicrmw add i16* @var16, i16 %offset acquire
43 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
46 ; CHECK-NEXT: add [[NEW:w[0-9]+]], w[[OLD]], w0
51 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
52    ret i16 %old
57    %old = atomicrmw add i32* @var32, i32 %offset release
63 ; ; CHECK: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]]
66 ; CHECK-NEXT: add [[NEW:w[0-9]+]], w[[OLD]], w0
71 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
72    ret i32 %old
77    %old = atomicrmw add i64* @var64, i64 %offset monotonic
83 ; ; CHECK: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
86 ; CHECK-NEXT: add [[NEW:x[0-9]+]], x[[OLD]], x0
91 ; CHECK: mov x0, x[[OLD]]
92    ret i64 %old
97    %old = atomicrmw sub i8* @var8, i8 %offset monotonic
103 ; ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
106 ; CHECK-NEXT: sub [[NEW:w[0-9]+]], w[[OLD]], w0
111 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
112    ret i8 %old
117    %old = atomicrmw sub i16* @var16, i16 %offset release
123 ; ; CHECK: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
126 ; CHECK-NEXT: sub [[NEW:w[0-9]+]], w[[OLD]], w0
131 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
132    ret i16 %old
137    %old = atomicrmw sub i32* @var32, i32 %offset acquire
143 ; ; CHECK: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
146 ; CHECK-NEXT: sub [[NEW:w[0-9]+]], w[[OLD]], w0
151 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
152    ret i32 %old
157    %old = atomicrmw sub i64* @var64, i64 %offset seq_cst
163 ; ; CHECK: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]]
166 ; CHECK-NEXT: sub [[NEW:x[0-9]+]], x[[OLD]], x0
171 ; CHECK: mov x0, x[[OLD]]
172    ret i64 %old
177    %old = atomicrmw and i8* @var8, i8 %offset release
183 ; ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
186 ; CHECK-NEXT: and [[NEW:w[0-9]+]], w[[OLD]], w0
191 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
192    ret i8 %old
197    %old = atomicrmw and i16* @var16, i16 %offset monotonic
203 ; ; CHECK: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
206 ; CHECK-NEXT: and [[NEW:w[0-9]+]], w[[OLD]], w0
211 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
212    ret i16 %old
217    %old = atomicrmw and i32* @var32, i32 %offset seq_cst
223 ; ; CHECK: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
226 ; CHECK-NEXT: and [[NEW:w[0-9]+]], w[[OLD]], w0
231 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
232    ret i32 %old
237    %old = atomicrmw and i64* @var64, i64 %offset acquire
243 ; ; CHECK: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]]
246 ; CHECK-NEXT: and [[NEW:x[0-9]+]], x[[OLD]], x0
251 ; CHECK: mov x0, x[[OLD]]
252    ret i64 %old
257    %old = atomicrmw or i8* @var8, i8 %offset seq_cst
263 ; ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
266 ; CHECK-NEXT: orr [[NEW:w[0-9]+]], w[[OLD]], w0
271 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
272    ret i8 %old
277    %old = atomicrmw or i16* @var16, i16 %offset monotonic
283 ; ; CHECK: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
286 ; CHECK-NEXT: orr [[NEW:w[0-9]+]], w[[OLD]], w0
291 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
292    ret i16 %old
297    %old = atomicrmw or i32* @var32, i32 %offset acquire
303 ; ; CHECK: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
306 ; CHECK-NEXT: orr [[NEW:w[0-9]+]], w[[OLD]], w0
311 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
312    ret i32 %old
317    %old = atomicrmw or i64* @var64, i64 %offset release
323 ; ; CHECK: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
326 ; CHECK-NEXT: orr [[NEW:x[0-9]+]], x[[OLD]], x0
331 ; CHECK: mov x0, x[[OLD]]
332    ret i64 %old
337    %old = atomicrmw xor i8* @var8, i8 %offset acquire
343 ; ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
346 ; CHECK-NEXT: eor [[NEW:w[0-9]+]], w[[OLD]], w0
351 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
352    ret i8 %old
357    %old = atomicrmw xor i16* @var16, i16 %offset release
363 ; ; CHECK: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
366 ; CHECK-NEXT: eor [[NEW:w[0-9]+]], w[[OLD]], w0
371 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
372    ret i16 %old
377    %old = atomicrmw xor i32* @var32, i32 %offset seq_cst
383 ; ; CHECK: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
386 ; CHECK-NEXT: eor [[NEW:w[0-9]+]], w[[OLD]], w0
391 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
392    ret i32 %old
397    %old = atomicrmw xor i64* @var64, i64 %offset monotonic
403 ; ; CHECK: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
406 ; CHECK-NEXT: eor [[NEW:x[0-9]+]], x[[OLD]], x0
411 ; CHECK: mov x0, x[[OLD]]
412    ret i64 %old
417    %old = atomicrmw xchg i8* @var8, i8 %offset monotonic
423 ; ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
430 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
431    ret i8 %old
436    %old = atomicrmw xchg i16* @var16, i16 %offset seq_cst
442 ; ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
449 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
450    ret i16 %old
455    %old = atomicrmw xchg i32* @var32, i32 %offset release
461 ; ; CHECK: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]]
468 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
469    ret i32 %old
474    %old = atomicrmw xchg i64* @var64, i64 %offset acquire
480 ; ; CHECK: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]]
487 ; CHECK: mov x0, x[[OLD]]
488    ret i64 %old
494    %old = atomicrmw min i8* @var8, i8 %offset acquire
500 ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
504 ; CHECK-NEXT: sxtb w[[OLD_EXT:[0-9]+]], w[[OLD]]
506 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, le
513    ret i8 %old
518    %old = atomicrmw min i16* @var16, i16 %offset release
524 ; CHECK: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
528 ; CHECK-NEXT: sxth w[[OLD_EXT:[0-9]+]], w[[OLD]]
530 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, le
538    ret i16 %old
543    %old = atomicrmw min i32* @var32, i32 %offset monotonic
549 ; CHECK: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]]
553 ; CHECK-NEXT: cmp w[[OLD]], w0
554 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, le
561 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
562    ret i32 %old
567    %old = atomicrmw min i64* @var64, i64 %offset seq_cst
573 ; CHECK: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]]
577 ; CHECK-NEXT: cmp x[[OLD]], x0
578 ; CHECK-NEXT: csel [[NEW:x[0-9]+]], x[[OLD]], x0, le
585 ; CHECK: mov x0, x[[OLD]]
586    ret i64 %old
591    %old = atomicrmw max i8* @var8, i8 %offset seq_cst
597 ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
601 ; CHECK-NEXT: sxtb w[[OLD_EXT:[0-9]+]], w[[OLD]]
603 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, gt
611    ret i8 %old
616    %old = atomicrmw max i16* @var16, i16 %offset acquire
622 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
626 ; CHECK-NEXT: sxth w[[OLD_EXT:[0-9]+]], w[[OLD]]
628 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, gt
636    ret i16 %old
641    %old = atomicrmw max i32* @var32, i32 %offset release
647 ; CHECK: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]]
651 ; CHECK-NEXT: cmp w[[OLD]], w0
652 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, gt
659 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
660    ret i32 %old
665    %old = atomicrmw max i64* @var64, i64 %offset monotonic
671 ; CHECK: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
675 ; CHECK-NEXT: cmp x[[OLD]], x0
676 ; CHECK-NEXT: csel [[NEW:x[0-9]+]], x[[OLD]], x0, gt
683 ; CHECK: mov x0, x[[OLD]]
684    ret i64 %old
689    %old = atomicrmw umin i8* @var8, i8 %offset monotonic
695 ; CHECK: ldxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
699 ; CHECK-NEXT: cmp w[[OLD]], w0, uxtb
700 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, ls
707 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
708    ret i8 %old
713    %old = atomicrmw umin i16* @var16, i16 %offset acquire
719 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
723 ; CHECK-NEXT: cmp w[[OLD]], w0, uxth
724 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, ls
731 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
732    ret i16 %old
737    %old = atomicrmw umin i32* @var32, i32 %offset seq_cst
743 ; CHECK: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
747 ; CHECK-NEXT: cmp w[[OLD]], w0
748 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, ls
755 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
756    ret i32 %old
761    %old = atomicrmw umin i64* @var64, i64 %offset acq_rel
767 ; CHECK: ldaxr x[[OLD:[0-9]+]], [x[[ADDR]]]
771 ; CHECK-NEXT: cmp x[[OLD]], x0
772 ; CHECK-NEXT: csel [[NEW:x[0-9]+]], x[[OLD]], x0, ls
779 ; CHECK: mov x0, x[[OLD]]
780    ret i64 %old
785    %old = atomicrmw umax i8* @var8, i8 %offset acq_rel
791 ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
795 ; CHECK-NEXT: cmp w[[OLD]], w0, uxtb
796 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, hi
803 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
804    ret i8 %old
809    %old = atomicrmw umax i16* @var16, i16 %offset monotonic
815 ; CHECK: ldxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
819 ; CHECK-NEXT: cmp w[[OLD]], w0, uxth
820 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, hi
827 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
828    ret i16 %old
833    %old = atomicrmw umax i32* @var32, i32 %offset seq_cst
839 ; CHECK: ldaxr w[[OLD:[0-9]+]], [x[[ADDR]]]
843 ; CHECK-NEXT: cmp w[[OLD]], w0
844 ; CHECK-NEXT: csel [[NEW:w[0-9]+]], w[[OLD]], w0, hi
851 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
852    ret i32 %old
857    %old = atomicrmw umax i64* @var64, i64 %offset release
863 ; CHECK: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
867 ; CHECK-NEXT: cmp x[[OLD]], x0
868 ; CHECK-NEXT: csel [[NEW:x[0-9]+]], x[[OLD]], x0, hi
875 ; CHECK: mov x0, x[[OLD]]
876    ret i64 %old
882    %old = extractvalue { i8, i1 } %pair, 0
889 ; CHECK: ldaxrb w[[OLD:[0-9]+]], [x[[ADDR]]]
892 ; CHECK-NEXT: cmp w[[OLD]], w0
900 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
901    ret i8 %old
907    %old = extractvalue { i16, i1 } %pair, 0
914 ; CHECK: ldaxrh w[[OLD:[0-9]+]], [x[[ADDR]]]
917 ; CHECK-NEXT: cmp w[[OLD]], w0
925 ; CHECK: mov {{[xw]}}0, {{[xw]}}[[OLD]]
926    ret i16 %old
932    %old = extractvalue { i32, i1 } %pair, 0
941 ; CHECK: ldxr w[[OLD:[0-9]+]], [x[[ADDR]]]
942 ; CHECK-NEXT: cmp w[[OLD]], w[[WANTED]]
949    ret i32 %old
955    %old = extractvalue { i64, i1 } %pair, 0
962 ; CHECK: ldxr x[[OLD:[0-9]+]], [x[[ADDR]]]
965 ; CHECK-NEXT: cmp x[[OLD]], x0
974 ; CHECK: str x[[OLD]],
975    store i64 %old, i64* @var64