Lines Matching full:rss

18   //Rdd[+]=vrmpybsu(Rss,Rtt)
23   //Rdd[+]=vrmpybu(Rss,Rtt)
41   // Rd=vaddhub(Rss,Rtt):sat
127 def S5_popcountp : ALU64_rr<(outs IntRegs:$Rd), (ins DoubleRegs:$Rss),
128   "$Rd = popcount($Rss)",
129   [(set I32:$Rd, (HexagonPOPCOUNT I64:$Rss))], "", S_2op_tc_2_SLOT23>,
132     bits<5> Rss;
139     let Inst{20-16} = Rss;
438   // Rss <= Rtt -> Rtt >= Rss.
510   // Rss <= Rtt -> Rtt >= Rss.
532   : SInst <(outs DoubleRegs:$Rdd), (ins DoubleRegs:$Rss),
533    "$Rdd = "#mnemonic#"($Rss)"#chop,
534    [(set RCOut:$Rdd, (Op RCIn:$Rss))], "",
537      bits<5> Rss;
542      let Inst{20-16} = Rss;
570   : SInst <(outs IntRegs:$Rd), (ins DoubleRegs:$Rss),
571    "$Rd = "#mnemonic#"($Rss)"#chop,
572    [(set RCOut:$Rd, (Op RCIn:$Rss))], "",
575      bits<5> Rss;
581      let Inst{20-16} = Rss;
805   (ins DoubleRegs:$Rss, u4Imm:$u4),
806   "$Rd = vasrhub($Rss, #$u4):"#!if(isSat, "sat", "raw"),
810     bits<5> Rss;
816     let Inst{20-16} = Rss;
829   : SInst <(outs IntRegs:$Rd), (ins DoubleRegs:$Rss, u4Imm:$u4),
830   "$Rd = vasrhub($Rss, #$u4):rnd:sat">, Requires<[HasV5T]>;
835                          (ins DoubleRegs:$Rss, u4Imm:$u4),
836   "$Rdd = vasrh($Rss, #$u4):raw">,
839     bits<5> Rss;
845     let Inst{20-16} = Rss;
854   : SInst <(outs DoubleRegs:$Rdd), (ins DoubleRegs:$Rss, u4Imm:$u4),
855   "$Rdd = vasrh($Rss,#$u4):rnd">, Requires<[HasV5T]>;
890 def F2_dfclass: ALU64Inst<(outs PredRegs:$Pd), (ins DoubleRegs:$Rss, u5Imm:$u5),
891   "$Pd = dfclass($Rss, #$u5)",
894     bits<5> Rss;
899     let Inst{20-16} = Rss;