82 sync_ring(int fd, unsigned ring, int num_children, int timeout)  in sync_ring()  argument
89 		for_each_physical_engine(fd, ring) {  in sync_ring()
98 		gem_require_ring(fd, ring);  in sync_ring()
103 	intel_detect_and_clear_missed_interrupts(fd);  in sync_ring()
112 		object.handle = gem_create(fd, 4096);  in sync_ring()
113 		gem_write(fd, object.handle, 0, &bbe, sizeof(bbe));  in sync_ring()
119 		gem_execbuf(fd, &execbuf);  in sync_ring()
120 		gem_sync(fd, object.handle);  in sync_ring()
126 				gem_execbuf(fd, &execbuf);  in sync_ring()
127 				gem_sync(fd, object.handle);  in sync_ring()
135 		gem_close(fd, object.handle);  in sync_ring()
138 	igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);  in sync_ring()
142 idle_ring(int fd, unsigned ring, int timeout)  in idle_ring()  argument
150 	gem_require_ring(fd, ring);  in idle_ring()
153 	object.handle = gem_create(fd, 4096);  in idle_ring()
154 	gem_write(fd, object.handle, 0, &bbe, sizeof(bbe));  in idle_ring()
160 	gem_execbuf(fd, &execbuf);  in idle_ring()
161 	gem_sync(fd, object.handle);  in idle_ring()
163 	intel_detect_and_clear_missed_interrupts(fd);  in idle_ring()
168 			gem_execbuf(fd, &execbuf);  in idle_ring()
169 			gem_quiescent_gpu(fd);  in idle_ring()
172 	igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);  in idle_ring()
177 	gem_close(fd, object.handle);  in idle_ring()
181 wakeup_ring(int fd, unsigned ring, int timeout, int wlen)  in wakeup_ring()  argument
188 		for_each_physical_engine(fd, ring) {  in wakeup_ring()
189 			if (!gem_can_store_dword(fd, ring))  in wakeup_ring()
199 		gem_require_ring(fd, ring);  in wakeup_ring()
200 		igt_require(gem_can_store_dword(fd, ring));  in wakeup_ring()
205 	intel_detect_and_clear_missed_interrupts(fd);  in wakeup_ring()
215 		object.handle = gem_create(fd, 4096);  in wakeup_ring()
216 		gem_write(fd, object.handle, 0, &bbe, sizeof(bbe));  in wakeup_ring()
223 		spin = __igt_spin_new(fd,  in wakeup_ring()
229 		gem_execbuf(fd, &execbuf);  in wakeup_ring()
232 		gem_sync(fd, object.handle);  in wakeup_ring()
241 				gem_execbuf(fd, &spin->execbuf);  in wakeup_ring()
246 				gem_sync(fd, spin->handle);  in wakeup_ring()
265 			gem_execbuf(fd, &spin->execbuf);  in wakeup_ring()
269 				gem_execbuf(fd, &execbuf);  in wakeup_ring()
273 			gem_sync(fd, object.handle);  in wakeup_ring()
286 		igt_spin_free(fd, spin);  in wakeup_ring()
287 		gem_close(fd, object.handle);  in wakeup_ring()
290 	igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);  in wakeup_ring()
293 static void active_ring(int fd, unsigned ring, int timeout)  in active_ring()  argument
300 		for_each_physical_engine(fd, ring) {  in active_ring()
301 			if (!gem_can_store_dword(fd, ring))  in active_ring()
311 		gem_require_ring(fd, ring);  in active_ring()
312 		igt_require(gem_can_store_dword(fd, ring));  in active_ring()
317 	intel_detect_and_clear_missed_interrupts(fd);  in active_ring()
323 		spin[0] = __igt_spin_new(fd,  in active_ring()
327 		spin[1] = __igt_spin_new(fd,  in active_ring()
339 				gem_sync(fd, s->handle);  in active_ring()
343 				gem_execbuf(fd, &s->execbuf);  in active_ring()
347 		igt_spin_free(fd, spin[1]);  in active_ring()
348 		igt_spin_free(fd, spin[0]);  in active_ring()
356 	igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);  in active_ring()
360 active_wakeup_ring(int fd, unsigned ring, int timeout, int wlen)  in active_wakeup_ring()  argument
367 		for_each_physical_engine(fd, ring) {  in active_wakeup_ring()
368 			if (!gem_can_store_dword(fd, ring))  in active_wakeup_ring()
378 		gem_require_ring(fd, ring);  in active_wakeup_ring()
379 		igt_require(gem_can_store_dword(fd, ring));  in active_wakeup_ring()
384 	intel_detect_and_clear_missed_interrupts(fd);  in active_wakeup_ring()
394 		object.handle = gem_create(fd, 4096);  in active_wakeup_ring()
395 		gem_write(fd, object.handle, 0, &bbe, sizeof(bbe));  in active_wakeup_ring()
402 		spin[0] = __igt_spin_new(fd,  in active_wakeup_ring()
408 		spin[1] = __igt_spin_new(fd,  in active_wakeup_ring()
413 		gem_execbuf(fd, &execbuf);  in active_wakeup_ring()
417 		gem_sync(fd, object.handle);  in active_wakeup_ring()
422 			gem_execbuf(fd, &spin[0]->execbuf);  in active_wakeup_ring()
432 				gem_execbuf(fd, &spin[1]->execbuf);  in active_wakeup_ring()
436 				gem_sync(fd, spin[0]->handle);  in active_wakeup_ring()
453 		gem_execbuf(fd, &spin[0]->execbuf);  in active_wakeup_ring()
462 				gem_execbuf(fd, &execbuf);  in active_wakeup_ring()
466 			gem_execbuf(fd, &spin[1]->execbuf);  in active_wakeup_ring()
470 			gem_sync(fd, object.handle);  in active_wakeup_ring()
485 		igt_spin_free(fd, spin[1]);  in active_wakeup_ring()
486 		igt_spin_free(fd, spin[0]);  in active_wakeup_ring()
487 		gem_close(fd, object.handle);  in active_wakeup_ring()
490 	igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);  in active_wakeup_ring()
494 store_ring(int fd, unsigned ring, int num_children, int timeout)  in store_ring()  argument
496 	const int gen = intel_gen(intel_get_drm_devid(fd));  in store_ring()
502 		for_each_physical_engine(fd, ring) {  in store_ring()
503 			if (!gem_can_store_dword(fd, ring))  in store_ring()
514 		gem_require_ring(fd, ring);  in store_ring()
515 		igt_require(gem_can_store_dword(fd, ring));  in store_ring()
520 	intel_detect_and_clear_missed_interrupts(fd);  in store_ring()
539 		object[0].handle = gem_create(fd, 4096);  in store_ring()
540 		gem_write(fd, object[0].handle, 0, &bbe, sizeof(bbe));  in store_ring()
542 		gem_execbuf(fd, &execbuf);  in store_ring()
545 		object[1].handle = gem_create(fd, 20*1024);  in store_ring()
550 		batch = gem_mmap__cpu(fd, object[1].handle, 0, 20*1024,  in store_ring()
552 		gem_set_domain(fd, object[1].handle,  in store_ring()
585 		gem_execbuf(fd, &execbuf);  in store_ring()
586 		gem_sync(fd, object[1].handle);  in store_ring()
592 				gem_execbuf(fd, &execbuf);  in store_ring()
593 				gem_sync(fd, object[1].handle);  in store_ring()
601 		gem_close(fd, object[1].handle);  in store_ring()
602 		gem_close(fd, object[0].handle);  in store_ring()
605 	igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);  in store_ring()
609 switch_ring(int fd, unsigned ring, int num_children, int timeout)  in switch_ring()  argument
611 	const int gen = intel_gen(intel_get_drm_devid(fd));  in switch_ring()
616 	gem_require_contexts(fd);  in switch_ring()
619 		for_each_physical_engine(fd, ring) {  in switch_ring()
620 			if (!gem_can_store_dword(fd, ring))  in switch_ring()
631 		gem_require_ring(fd, ring);  in switch_ring()
632 		igt_require(gem_can_store_dword(fd, ring));  in switch_ring()
637 	intel_detect_and_clear_missed_interrupts(fd);  in switch_ring()
660 			c->execbuf.rsvd1 = gem_context_create(fd);  in switch_ring()
663 			c->object[0].handle = gem_create(fd, 4096);  in switch_ring()
664 			gem_write(fd, c->object[0].handle, 0, &bbe, sizeof(bbe));  in switch_ring()
666 			gem_execbuf(fd, &c->execbuf);  in switch_ring()
669 			c->object[1].handle = gem_create(fd, sz);  in switch_ring()
674 			batch = gem_mmap__cpu(fd, c->object[1].handle, 0, sz,  in switch_ring()
676 			gem_set_domain(fd, c->object[1].handle,  in switch_ring()
710 			gem_execbuf(fd, &c->execbuf);  in switch_ring()
711 			gem_sync(fd, c->object[1].handle);  in switch_ring()
720 				gem_execbuf(fd, &contexts[1].execbuf);  in switch_ring()
721 				gem_execbuf(fd, &contexts[0].execbuf);  in switch_ring()
724 				gem_sync(fd, contexts[1].object[1].handle);  in switch_ring()
725 				gem_sync(fd, contexts[0].object[1].handle);  in switch_ring()
737 				gem_execbuf(fd, &contexts[1].execbuf);  in switch_ring()
738 				gem_execbuf(fd, &contexts[0].execbuf);  in switch_ring()
741 				gem_sync(fd, contexts[0].object[1].handle);  in switch_ring()
744 				gem_sync(fd, contexts[1].object[1].handle);  in switch_ring()
755 			gem_close(fd, contexts[i].object[1].handle);  in switch_ring()
756 			gem_close(fd, contexts[i].object[0].handle);  in switch_ring()
757 			gem_context_destroy(fd, contexts[i].execbuf.rsvd1);  in switch_ring()
761 	igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);  in switch_ring()
780 	int fd;  member
799 		gem_sync(w->fd, w->object.handle);  in waiter()
801 			gem_sync(w->fd, w->handles[n]);  in waiter()
806 __store_many(int fd, unsigned ring, int timeout, unsigned long *cycles)  in __store_many()  argument
808 	const int gen = intel_gen(intel_get_drm_devid(fd));  in __store_many()
827 	object[0].handle = gem_create(fd, 4096);  in __store_many()
828 	gem_write(fd, object[0].handle, 0, &bbe, sizeof(bbe));  in __store_many()
830 	gem_execbuf(fd, &execbuf);  in __store_many()
868 		threads[i].fd = fd;  in __store_many()
870 		threads[i].object.handle = gem_create(fd, 20*1024);  in __store_many()
871 		gem_write(fd, threads[i].object.handle, 0, batch, 20*1024);  in __store_many()
903 			gem_execbuf(fd, &execbuf);  in __store_many()
927 		gem_close(fd, threads[i].object.handle);  in __store_many()
930 	gem_close(fd, object[0].handle);  in __store_many()
934 store_many(int fd, unsigned ring, int timeout)  in store_many()  argument
943 	intel_detect_and_clear_missed_interrupts(fd);  in store_many()
946 		for_each_physical_engine(fd, ring) {  in store_many()
947 			if (!gem_can_store_dword(fd, ring))  in store_many()
951 				__store_many(fd,  in store_many()
960 		gem_require_ring(fd, ring);  in store_many()
961 		igt_require(gem_can_store_dword(fd, ring));  in store_many()
962 		__store_many(fd, ring, timeout, &shared[n]);  in store_many()
970 	igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);  in store_many()
975 sync_all(int fd, int num_children, int timeout)  in sync_all()  argument
980 	for_each_physical_engine(fd, engine) {  in sync_all()
987 	intel_detect_and_clear_missed_interrupts(fd);  in sync_all()
996 		object.handle = gem_create(fd, 4096);  in sync_all()
997 		gem_write(fd, object.handle, 0, &bbe, sizeof(bbe));  in sync_all()
1002 		gem_execbuf(fd, &execbuf);  in sync_all()
1003 		gem_sync(fd, object.handle);  in sync_all()
1011 					gem_execbuf(fd, &execbuf);  in sync_all()
1013 				gem_sync(fd, object.handle);  in sync_all()
1019 		gem_close(fd, object.handle);  in sync_all()
1022 	igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);  in sync_all()
1026 store_all(int fd, int num_children, int timeout)  in store_all()  argument
1028 	const int gen = intel_gen(intel_get_drm_devid(fd));  in store_all()
1033 	for_each_physical_engine(fd, ring) {  in store_all()
1034 		if (!gem_can_store_dword(fd, ring))  in store_all()
1043 	intel_detect_and_clear_missed_interrupts(fd);  in store_all()
1061 		object[0].handle = gem_create(fd, 4096);  in store_all()
1062 		gem_write(fd, object[0].handle, 0, &bbe, sizeof(bbe));  in store_all()
1064 		gem_execbuf(fd, &execbuf);  in store_all()
1067 		object[1].handle = gem_create(fd, 1024*16 + 4096);  in store_all()
1072 		batch = gem_mmap__cpu(fd, object[1].handle, 0, 16*1024 + 4096,  in store_all()
1074 		gem_set_domain(fd, object[1].handle,  in store_all()
1107 		gem_execbuf(fd, &execbuf);  in store_all()
1108 		gem_sync(fd, object[1].handle);  in store_all()
1118 					gem_execbuf(fd, &execbuf);  in store_all()
1120 				gem_sync(fd, object[1].handle);  in store_all()
1126 		gem_close(fd, object[1].handle);  in store_all()
1127 		gem_close(fd, object[0].handle);  in store_all()
1130 	igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);  in store_all()
1134 preempt(int fd, unsigned ring, int num_children, int timeout)  in preempt()  argument
1142 		for_each_physical_engine(fd, ring) {  in preempt()
1151 		gem_require_ring(fd, ring);  in preempt()
1156 	ctx[0] = gem_context_create(fd);  in preempt()
1157 	gem_context_set_priority(fd, ctx[0], MIN_PRIO);  in preempt()
1159 	ctx[1] = gem_context_create(fd);  in preempt()
1160 	gem_context_set_priority(fd, ctx[1], MAX_PRIO);  in preempt()
1162 	intel_detect_and_clear_missed_interrupts(fd);  in preempt()
1171 		object.handle = gem_create(fd, 4096);  in preempt()
1172 		gem_write(fd, object.handle, 0, &bbe, sizeof(bbe));  in preempt()
1179 		gem_execbuf(fd, &execbuf);  in preempt()
1180 		gem_sync(fd, object.handle);  in preempt()
1186 				__igt_spin_new(fd,  in preempt()
1191 				gem_execbuf(fd, &execbuf);  in preempt()
1192 				gem_sync(fd, object.handle);  in preempt()
1195 			igt_spin_free(fd, spin);  in preempt()
1202 		gem_close(fd, object.handle);  in preempt()
1205 	igt_assert_eq(intel_detect_and_clear_missed_interrupts(fd), 0);  in preempt()
1207 	gem_context_destroy(fd, ctx[1]);  in preempt()
1208 	gem_context_destroy(fd, ctx[0]);  in preempt()
1215 	int fd = -1;  variable
1220 		fd = drm_open_driver(DRIVER_INTEL);
1221 		igt_require_gem(fd);
1222 		gem_submission_print_method(fd);
1223 		gem_scheduler_print_capability(fd);
1225 		igt_fork_hang_detector(fd);
1230 			sync_ring(fd, e->exec_id | e->flags, 1, 150);
1232 			idle_ring(fd, e->exec_id | e->flags, 150);
1234 			active_ring(fd, e->exec_id | e->flags, 150);
1236 			wakeup_ring(fd, e->exec_id | e->flags, 150, 1);
1238 			active_wakeup_ring(fd, e->exec_id | e->flags, 150, 1);
1240 			wakeup_ring(fd, e->exec_id | e->flags, 150, 2);
1242 			store_ring(fd, e->exec_id | e->flags, 1, 150);
1244 			switch_ring(fd, e->exec_id | e->flags, 1, 150);
1246 			switch_ring(fd, e->exec_id | e->flags, ncpus, 150);
1248 			store_many(fd, e->exec_id | e->flags, 150);
1250 			sync_ring(fd, e->exec_id | e->flags, ncpus, 150);
1252 			store_ring(fd, e->exec_id | e->flags, ncpus, 150);
1256 		sync_ring(fd, ALL_ENGINES, 1, 5);
1258 		store_ring(fd, ALL_ENGINES, 1, 5);
1260 		store_many(fd, ALL_ENGINES, 5);
1262 		switch_ring(fd, ALL_ENGINES, 1, 150);
1264 		switch_ring(fd, ALL_ENGINES, ncpus, 150);
1266 		sync_ring(fd, ALL_ENGINES, ncpus, 150);
1268 		store_ring(fd, ALL_ENGINES, ncpus, 150);
1270 		active_ring(fd, ALL_ENGINES, 150);
1272 		wakeup_ring(fd, ALL_ENGINES, 150, 1);
1274 		active_wakeup_ring(fd, ALL_ENGINES, 150, 1);
1276 		wakeup_ring(fd, ALL_ENGINES, 150, 2);
1279 		sync_all(fd, 1, 5);
1281 		store_all(fd, 1, 5);
1284 		sync_all(fd, 1, 150);
1286 		store_all(fd, 1, 150);
1288 		sync_all(fd, ncpus, 150);
1290 		store_all(fd, ncpus, 150);
1294 			gem_require_contexts(fd);
1295 			igt_require(gem_scheduler_has_ctx_priority(fd));
1296 			igt_require(gem_scheduler_has_preemption(fd));
1300 			preempt(fd, ALL_ENGINES, 1, 20);
1304 				preempt(fd, e->exec_id | e->flags, ncpus, 150);
1310 		close(fd);