Lines Matching +full:write +full:- +full:host
2 * Use of this source code is governed by a BSD-style license that can be
6 /* Host communication command constants for Chrome EC */
18 * ARM Cortex-M if the structures are guaranteed 32-bit aligned.
40 /* I/O addresses for host command */
44 /* I/O addresses for host command args and params */
53 /* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff
60 #define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */
61 #define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */
63 #define EC_LPC_CMDR_CMD (1 << 3) /* Last host write was a command */
73 #define EC_MEMMAP_TEMP_SENSOR 0x00 /* Temp sensors 0x00 - 0x0f */
74 #define EC_MEMMAP_FAN 0x10 /* Fan speeds 0x10 - 0x17 */
75 #define EC_MEMMAP_TEMP_SENSOR_B 0x18 /* More temp sensors 0x18 - 0x1f */
77 #define EC_MEMMAP_ID_VERSION 0x22 /* Version of data in 0x20 - 0x2f */
78 #define EC_MEMMAP_THERMAL_VERSION 0x23 /* Version of data in 0x00 - 0x1f */
79 #define EC_MEMMAP_BATTERY_VERSION 0x24 /* Version of data in 0x40 - 0x7f */
80 #define EC_MEMMAP_SWITCHES_VERSION 0x25 /* Version of data in 0x30 - 0x33 */
81 #define EC_MEMMAP_EVENTS_VERSION 0x26 /* Version of data in 0x34 - 0x3f */
82 #define EC_MEMMAP_HOST_CMD_FLAGS 0x27 /* Host cmd interface flags (8 bits) */
83 /* Unused 0x28 - 0x2f */
85 /* Unused 0x31 - 0x33 */
87 /* Reserve 0x38 - 0x3f for additional host event-related stuff */
103 /* Unused 0x84 - 0x8f */
106 #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */
108 /* 0x94 - 0x99: 1st Accelerometer */
109 /* 0x9a - 0x9f: 2nd Accelerometer */
110 #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */
111 /* Unused 0xa6 - 0xdf */
115 * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe
141 * reporting a temperature range of 200K to 454K = -73C to 181C.
153 * triggering alarms on the host.
155 #define EC_TEMP_SENSOR_DEFAULT (296 - EC_TEMP_SENSOR_OFFSET)
179 /* Host command interface flags */
180 /* Host command interface supports LPC args (LPC interface only) */
182 /* Host command interface supports version 3 protocol */
206 * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD
207 * - Wait for EC_LPC_CMDR_PENDING bit to clear
208 * - Write address to EC_LPC_ADDR_ACPI_DATA
209 * - Wait for EC_LPC_CMDR_DATA bit to set
210 * - Read value from EC_LPC_ADDR_ACPI_DATA
215 * ACPI Write Embedded Controller
221 * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD
222 * - Wait for EC_LPC_CMDR_PENDING bit to clear
223 * - Write address to EC_LPC_ADDR_ACPI_DATA
224 * - Wait for EC_LPC_CMDR_PENDING bit to clear
225 * - Write value to EC_LPC_ADDR_ACPI_DATA
232 * This enables burst mode on the EC to allow the host to issue several
233 * commands back-to-back. While in this mode, writes to mapped multi-byte
242 * multi-byte data.
249 * This clears the lowest-order bit in the currently pending host events, and
250 * sets the result code to the 1-based index of the bit (event 0x00000001 = 1,
255 /* Valid addresses in ACPI memory space, for read/write commands */
260 * Test location; writing value here updates test compliment byte to (0xff -
267 /* Keyboard backlight brightness percent (0 - 100) */
269 /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */
277 * as the memory-mapped sensors. The COMMIT register applies those settings.
294 * Each write to the commit register affects one threshold.
302 * write 2 to [0x05] -- select temp sensor 2
303 * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET
304 * write 0x2 to [0x07] -- enable threshold 0 with this value
305 * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET
306 * write 0x3 to [0x07] -- enable threshold 1 with this value
309 * write 2 to [0x05] -- select temp sensor 2
310 * write 0x1 to [0x07] -- disable threshold 1
329 * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data
330 * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2.
341 * is pre-processed to handle constants but the ASL compiler is unable to
361 * 32-bit aligned, as it should be for all buffers.
368 * the parent structure. This is particularly important if the sub-structure
372 * Also be very careful using __packed - particularly when nesting non-packed
379 * "__packed" - generates inefficient code; all sub-structs must also be packed
381 * "struct [^_]" - all structs should be annotated, except for structs that are
396 * Packed structure which must be under-aligned, because its size is not a
397 * 4-byte multiple. This is sub-optimal because it forces byte-wise access
398 * of all multi-byte fields in it, even though they are themselves aligned.
406 * Packed structure which must be under-aligned, because its offset inside a
407 * parent structure is not a 4-byte multiple.
427 * byte-wise reads.
441 /* EC has written a byte in the data register and host hasn't read it yet */
443 /* Host has written a command/data byte and the EC hasn't read it yet */
447 /* Last write to EC was a command, not data */
459 * EC is busy. This covers both the EC processing a command, and the host has
465 /* Host command response codes (16-bit). Note that response codes should be
489 * Host event codes. Note these are 1-based, not 0-based, because ACPI query
511 * EC has finished initializing the host interface. The host can check
529 /* Hang detect logic detected a hang and host event timeout expired */
534 /* PD MCU triggering host event */
552 /* EC desires to change state of host-controlled USB mux */
563 * secondary host event word is set. See crbug.com/633646.
568 * The high bit of the event mask is not used as a host event code. If
570 * considered invalid by the host. This can happen when reading the
572 * not initialized on the EC, or improperly configured on the host.
576 /* Host event mask */
577 #define EC_HOST_EVENT_MASK(event_code) (1UL << ((event_code) - 1))
593 * Args are from host. Data area at EC_LPC_ADDR_HOST_PARAM contains command
596 * If EC gets a command and this flag is not set, this is an old-style command.
597 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with
598 * unknown length. EC must respond with an old-style response (that is,
605 * If EC responds to a command and this flag is not set, this is an old-style
620 * 1. - - AP asserts chip select (CS#)
621 * 2. EC_SPI_OLD_READY - AP sends first byte(s) of request
622 * 3. - - EC starts handling CS# interrupt
623 * 4. EC_SPI_RECEIVING - AP sends remaining byte(s) of request
624 * 5. EC_SPI_PROCESSING - EC starts processing request; AP is clocking in
626 * 6. - - EC finishes processing and sets up response
627 * 7. EC_SPI_FRAME_START - AP reads frame byte
628 * 8. (response packet) - AP reads response packet
629 * 9. EC_SPI_PAST_END - Any additional bytes read by AP
630 * 10 - - AP deasserts chip select
631 * 11 - - EC processes CS# interrupt and sets up DMA for
689 * by the AP as part of a request packet, or (for old-style ECs) is processing
703 * N+3 8-bit checksum of bytes 0..N+2
710 * M+2 8-bit checksum of bytes 0..M+1
735 * 3+ structs are being used. Usage is bus-dependent.
741 /* Version 3 request from host */
796 * Each command is an 16-bit command value. Commands which take params or
801 * those are implementation-dependent and not defined here.
803 * All commands MUST be #defined to be 4-digit UPPER CASE hex values
811 * Get protocol version, used to deal with non-backward compatible protocol
844 /* Null-terminated version strings for RO, RW */
847 char reserved[32]; /* Was previously RW-B string */
866 * Response is null-terminated string.
874 /* Null-terminated strings */
888 * Read memory-mapped data.
890 * This is an alternate interface to memory-mapped data for bus protocols
891 * which don't support direct-mapped memory - I2C, SPI, etc.
923 * on lpc since it has its own out-of-band busy indicator.
1032 * The host goes through the EC to access these sensors.
1051 /* Monitor host events, through for example SMI or SCI */
1066 /* EC can detect when the host hangs. */
1080 /* EC decides on USB-C SS mux state, muxes configured by host */
1082 /* EC has RTC feature that can be controlled by host commands */
1094 /* EC supports 64-bit host events */
1101 #define EC_FEATURE_MASK_1(event_code) (1UL << (event_code - 32))
1118 * Write block size. Write offset and size must be a multiple
1138 /* Flash must be selected for read/write/erase operations to succeed. This may
1139 * be necessary on a chip where write/erase can be corrupted by other board
1141 * or where the read/write/erase operations require cleanly suspending other
1150 * if they did we'd define the version 0 structure as a sub-structure of this
1168 * Ideal write size in bytes. Writes will be fastest if size is
1170 * may have a write buffer which can do half-page operations if data is
1171 * aligned, and a slower word-at-a-time write mode.
1189 /* Size in power of 2 of each sector (8 --> 256 bytes) */
1191 /* Minimal write size for the sectors in this bank */
1195 /* Size for write protection, usually identical to erase size. */
1206 /* Maximum size to use to send data to write to the EC. */
1227 /* Write flash */
1235 uint32_t offset; /* Byte offset to write */
1236 uint32_t size; /* Size to write in bytes */
1237 /* Followed by data to write */
1288 * firmware write protect GPIO, not all flags will take effect immediately;
1301 * RO flash code protected now. If this bit is set, at-boot status cannot
1307 /* Flash write protect GPIO is asserted now */
1309 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */
1312 * Error - flash protection is in inconsistent state. At least one bank of
1314 * re-requesting the desired flags, or by a hard reset if that fails.
1347 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash
1348 * write protect. These commands may be reused with version > 0.
1356 /* Region which holds read-only EC image */
1361 * Region which should be write-protected in the factory (a superset of
1378 /* Read/write VbNvContext */
1450 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
1459 /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */
1485 /* All types, indexed by board-specific enum pwm_channel */
1497 uint8_t index; /* Type-specific index, or 0 if unique */
1504 uint8_t index; /* Type-specific index, or 0 if unique */
1513 * Lightbar commands. This looks worse than it is. Since we only use one HOST
1526 * host command, but the alignment is the same regardless. Keep it that way.
1552 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1559 struct rgb_s color[8]; /* 0-3 are Google colors */
1579 /* Tap-for-battery params */
1598 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1604 /* s5: single color pulse on inhibited power-up */
1608 struct rgb_s color[8]; /* 0-3 are Google colors */
1639 /* Tap-for-battery params */
1664 uint8_t battery_threshold[LB_BATTERY_LEVELS - 1];
1672 /* s5: single color pulse on inhibited power-up */
1676 struct rgb_s color[8]; /* 0-3 are Google colors */
1825 * May be on power button or on C-panel.
1914 EC_VBOOT_HASH_TYPE_SHA256 = 0, /* SHA-256 */
1933 * Motion sense commands. We'll make separate structs for sub-commands with
1973 * a specified motion sensor in +/-G's or +/- deg/s.
1982 * un-calibrated value, hence the wake angle isn't exact.
1998 * The host can use that element to synchronize its operation.
2016 * The offsets can be calculated by the host, or via
2051 /* Number of motionsense sub-commands. */
2094 /* Each sensor is up to 3-axis. */
2143 /* Module flag masks used for the dump sub-command. */
2146 /* Sensor flag masks used for the dump sub-command. */
2163 #define EC_MOTION_SENSE_NO_VALUE -1
2193 * Maximal number of sensor the host is expecting.
2194 * 0 means the host is only interested in the number
2224 /* Rounding flag, true for round-up, false for down. */
2438 /* Persistent storage for host */
2449 /* Access size; read/write offset and size must be a multiple of this */
2465 /* Write persistent storage */
2469 uint32_t offset; /* Byte offset to write */
2470 uint32_t size; /* Size to write in bytes */
2475 /* Real-time clock */
2540 /* Temporary secure storage for host verified boot use */
2573 * Write temporary secure storage and lock it.
2578 uint8_t slot; /* Slot to write to */
2596 /* Version 0 - set */
2603 /* Version 0 - get */
2627 * Note that this structure is a sub-structure of
2636 /* Version 1 - get config for one sensor. */
2642 /* Version 1 - set config for one sensor.
2643 * Use read-modify-write for best results! */
2725 /* MKBP - Matrix KeyBoard Protocol */
2826 * Note that this is used as a sub-structure of
2837 * minimum post-scan relax time. Once we finish a scan we check
2926 /* New host event. The event data is 4 bytes of host event flags. */
2932 /* The state of the non-matrixed buttons have changed. */
3020 * Note: host commands 0x80 - 0x87 are reserved to avoid conflict with ACPI
3026 /* Host event commands */
3029 * Host event mask params and response structures, shared by all of the host
3081 * Flags to leave enabled in S3, if they're on at the S0->S3
3082 * transition. (Other flags will be disabled by the S0->S3
3101 /* GPIO commands. Only available on EC if write protect has been disabled. */
3156 /* I2C commands. Only available when flash write protect is unlocked. */
3169 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
3179 /* Write I2C bus */
3184 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */
3191 /* Charge state commands. Only available when flash write protect unlocked. */
3210 /* Console commands. Only available when flash write protect is unlocked. */
3224 * Response is null-terminated string. Empty string, if there is no more
3241 * Cut off battery power immediately or after the host has shut down.
3319 /* Read data; if not present, message is a write */
3333 uint16_t len; /* Number of bytes to read or write */
3340 /* Data to write for all messages is concatenated here */
3364 /* Start of AP S3->S0 transition (booting or resuming from suspend) */
3372 /* Any host command from AP received */
3375 /* Stop on end of AP S0->S3 transition (suspending or shutting down) */
3397 /* Timeout in msec before generating host event, if enabled */
3408 * This is the single catch-all host command to exchange data regarding the
3413 /* Subcommands for this host command */
3422 * Known param numbers are defined here. Ranges are reserved for board-specific
3429 CS_PARAM_CHG_STATUS, /* charger-specific status */
3430 CS_PARAM_CHG_OPTION, /* charger-specific options */
3585 /* Smart battery pass-through */
3587 /* Get / Set 16-bit smart battery registers */
3622 * Get or set vendor-specific parameters in the battery. Implementations may
3687 } write; member
3723 * certain addresses (board-specific).
3755 /* (command 3 was jump to RW-B) */
3756 EC_REBOOT_COLD = 4, /* Cold-reboot */
3773 * Returns variable-length platform-dependent panic information. See panic.h
3791 * reboots, the host will reboot too, so there is no response to this command.
3800 * Returns EC_RES_UNAVAILABLE if there is no response available - for example,
3846 #define PD_STATUS_HOST_EVENT (1 << 0) /* Forward host event to AP */
3862 /* AP to PD MCU host event status command, cleared on read */
3865 /* PD MCU host event status bits */
3871 uint32_t status; /* PD MCU host event status */
3874 /* Set USB type-C port role and muxes */
3988 /* Write USB-PD device FW */
4002 uint32_t size; /* Size to write in bytes */
4003 /* Followed by data to write */
4006 /* Write USB-PD Accessory RW_HASH table entry */
4008 /* RW hash is first 20 bytes of SHA-256 of RW section */
4019 /* Read USB-PD Accessory info */
4026 /* Read USB-PD Device discovery info */
4029 uint16_t vid; /* USB-IF VID */
4030 uint16_t pid; /* USB-IF PID */
4039 OVERRIDE_DONT_CHARGE = -2,
4040 OVERRIDE_OFF = -1,
4055 uint16_t data; /* type-defined data payload */
4137 /* Get/Set USB-PD Alternate mode info */
4175 /* Control USB-PD chip */
4190 /* Get info about USB-C SS muxes */
4194 uint8_t port; /* USB-C port number */
4204 uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */
4210 uint8_t port; /* USB-C port number */
4244 /* The command range 0x200-0x2FF is reserved for Rotor. */
4248 * Reserve a range of host commands for the CR51 firmware.
4254 /* Fingerprint MCU commands: range 0x0400-0x040x */
4262 uint16_t len; /* Number of bytes to write then read */
4324 /* Get the last captured finger frame: TODO: will be AES-encrypted */
4333 /* Touchpad MCU commands: range 0x0500-0x05FF */
4360 * Reserve a range of host commands for board-specific, experimental, or
4366 * All commands MUST be #defined to be 4-digit UPPER CASE hex values
4388 * Given the private host command offset, calculate the true private host
4398 * Some platforms have sub-processors chained to each other. For example.
4400 * AP <--> EC <--> PD MCU
4404 * command; other device mapping is board-specific.
4406 * When a device receives a command to be passed to a sub-processor, it passes
4407 * it on with the device number set back to 0. This allows the sub-processor
4417 /* Offset and max command number for sub-device n */