Lines Matching +full:36 +full:- +full:sky
2 Copyright (C) 1995-2024 Free Software Foundation, Inc.
26 /* Type for a 16-bit quantity. */
30 /* Types for signed and unsigned 32-bit quantities. */
36 /* Types for signed and unsigned 64-bit quantities. */
50 /* Type for section indices, which are 16-bit quantities. */
72 Elf32_Word e_flags; /* Processor-specific flags */
90 Elf64_Word e_flags; /* Processor-specific flags */
121 #define ELFCLASS32 1 /* 32-bit objects */
122 #define ELFCLASS64 2 /* 64-bit objects */
137 #define ELFOSABI_HPUX 1 /* HP-UX */
164 #define ET_LOOS 0xfe00 /* OS-specific range start */
165 #define ET_HIOS 0xfeff /* OS-specific range end */
166 #define ET_LOPROC 0xff00 /* Processor-specific range start */
167 #define ET_HIPROC 0xffff /* Processor-specific range end */
179 #define EM_MIPS 8 /* MIPS R3000 big-endian */
181 #define EM_MIPS_RS3_LE 10 /* MIPS R3000 little-endian */
182 /* reserved 11-14 */
189 #define EM_PPC64 21 /* PowerPC 64-bit */
192 /* reserved 24-35 */
193 #define EM_V800 36 /* NEC V800 series */
195 #define EM_RH32 38 /* TRW RH-32 */
200 #define EM_SPARCV9 43 /* SPARC v9 64-bit */
208 #define EM_MIPS_X 51 /* Stanford MIPS-X */
219 #define EM_X86_64 62 /* AMD x86-64 architecture */
221 #define EM_PDP10 64 /* Digital PDP-10 */
222 #define EM_PDP11 65 /* Digital PDP-11 */
233 #define EM_CRIS 76 /* Axis Communications 32-bit emb.proc */
234 #define EM_JAVELIN 77 /* Infineon Technologies 32-bit emb.proc */
235 #define EM_FIREPATH 78 /* Element 14 64-bit DSP Processor */
236 #define EM_ZSP 79 /* LSI Logic 16-bit DSP Processor */
237 #define EM_MMIX 80 /* Donald Knuth's educational 64-bit proc */
238 #define EM_HUANY 81 /* Harvard University machine-independent object files */
240 #define EM_AVR 83 /* Atmel AVR 8-bit microcontroller */
249 #define EM_OPENRISC 92 /* OpenRISC 32-bit embedded processor */
267 #define EM_UNICORE 110 /* PKU-Unity & MPRC Peking Uni. mc series */
278 /* reserved 121-130 */
284 #define EM_DSP24 136 /* New Japan Radio (NJR) 24-bit DSP */
293 /* reserved 145-159 */
304 #define EM_XIMO16 170 /* New Japan Radio (NJR) 16-bit DSP */
319 #define EM_AVR32 185 /* Amtel 32-bit microprocessor */
325 #define EM_TILEGX 191 /* Tilera TILE-Gx */
327 #define EM_COREA_1ST 193 /* KIPO-KAIST Core-A 1st gen. */
328 #define EM_COREA_2ND 194 /* KIPO-KAIST Core-A 2nd gen. */
338 #define EM_MCHP_PIC 204 /* Microchip 8-bit PIC(r) */
340 /* reserved 206-209 */
356 /* reserved 225-242 */
357 #define EM_RISCV 243 /* RISC-V */
359 #define EM_BPF 247 /* Linux BPF -- in-kernel virtual machine */
360 #define EM_CSKY 252 /* C-SKY */
371 chances of collision with official or non-GNU unofficial values. */
415 #define SHN_LOPROC 0xff00 /* Start of processor-specific */
420 #define SHN_HIPROC 0xff1f /* End of processor-specific */
421 #define SHN_LOOS 0xff20 /* Start of OS-specific */
422 #define SHN_HIOS 0xff3f /* End of OS-specific */
444 #define SHT_PREINIT_ARRAY 16 /* Array of pre-constructors */
449 #define SHT_LOOS 0x60000000 /* Start OS-specific. */
451 #define SHT_GNU_HASH 0x6ffffff6 /* GNU-style hash table. */
454 #define SHT_LOSUNW 0x6ffffffa /* Sun-specific low bound. */
461 #define SHT_HISUNW 0x6fffffff /* Sun-specific high bound. */
462 #define SHT_HIOS 0x6fffffff /* End OS-specific type */
463 #define SHT_LOPROC 0x70000000 /* Start of processor-specific */
464 #define SHT_HIPROC 0x7fffffff /* End of processor-specific */
465 #define SHT_LOUSER 0x80000000 /* Start of application-specific */
466 #define SHT_HIUSER 0x8fffffff /* End of application-specific */
474 #define SHF_STRINGS (1 << 5) /* Contains nul-terminated strings */
477 #define SHF_OS_NONCONFORMING (1 << 8) /* Non-standard OS specific handling
480 #define SHF_TLS (1 << 10) /* Section hold thread-local data. */
482 #define SHF_MASKOS 0x0ff00000 /* OS-specific. */
483 #define SHF_MASKPROC 0xf0000000 /* Processor-specific */
510 #define ELFCOMPRESS_LOOS 0x60000000 /* Start of OS-specific. */
511 #define ELFCOMPRESS_HIOS 0x6fffffff /* End of OS-specific. */
512 #define ELFCOMPRESS_LOPROC 0x70000000 /* Start of processor-specific. */
513 #define ELFCOMPRESS_HIPROC 0x7fffffff /* End of processor-specific. */
562 #define SYMINFO_FLG_PASSTHRU 0x0002 /* Pass-through symbol for translator */
563 #define SYMINFO_FLG_COPY 0x0004 /* Symbol is a copy-reloc */
578 /* Both Elf32_Sym and Elf64_Sym use the same one-byte st_info field. */
589 #define STB_LOOS 10 /* Start of OS-specific */
591 #define STB_HIOS 12 /* End of OS-specific */
592 #define STB_LOPROC 13 /* Start of processor-specific */
593 #define STB_HIPROC 15 /* End of processor-specific */
603 #define STT_TLS 6 /* Symbol is thread-local data object*/
605 #define STT_LOOS 10 /* Start of OS-specific */
607 #define STT_HIOS 12 /* End of OS-specific */
608 #define STT_LOPROC 13 /* Start of processor-specific */
609 #define STT_HIPROC 15 /* End of processor-specific */
724 #define PT_TLS 7 /* Thread-local storage segment */
726 #define PT_LOOS 0x60000000 /* Start of OS-specific */
729 #define PT_GNU_RELRO 0x6474e552 /* Read-only after relocation */
736 #define PT_HIOS 0x6fffffff /* End of OS-specific */
737 #define PT_LOPROC 0x70000000 /* Start of processor-specific */
738 #define PT_HIPROC 0x7fffffff /* End of processor-specific */
745 #define PF_MASKOS 0x0ff00000 /* OS-specific */
746 #define PF_MASKPROC 0xf0000000 /* Processor-specific */
809 #define NT_S390_VXRS_LOW 0x309 /* s390 vector registers 0-15
811 #define NT_S390_VXRS_HIGH 0x30a /* s390 vector registers 16-31. */
836 #define NT_MIPS_FP_MODE 0x801 /* MIPS floating-point mode. */
838 #define NT_RISCV_CSR 0x900 /* RISC-V Control and Status Registers */
839 #define NT_RISCV_VECTOR 0x901 /* RISC-V vector registers */
917 #define DT_RELR 36 /* Address of RELR relative relocations */
920 #define DT_LOOS 0x6000000d /* Start of OS-specific */
921 #define DT_HIOS 0x6ffff000 /* End of OS-specific */
922 #define DT_LOPROC 0x70000000 /* Start of processor-specific */
923 #define DT_HIPROC 0x7fffffff /* End of processor-specific */
943 #define DT_VALTAGIDX(tag) (DT_VALRNGHI - (tag)) /* Reverse order! */
952 #define DT_GNU_HASH 0x6ffffef5 /* GNU-style hash table. */
964 #define DT_ADDRTAGIDX(tag) (DT_ADDRRNGHI - (tag)) /* Reverse order! */
982 #define DT_VERSIONTAGIDX(tag) (DT_VERNEEDNUM - (tag)) /* Reverse order! */
985 /* Sun added these machine-independent extensions in the "processor-specific"
989 #define DT_EXTRATAGIDX(tag) ((Elf32_Word)-((Elf32_Sword) (tag) <<1>>1)-1)
1017 #define DF_1_DISPRELPND 0x00010000 /* Disp reloc applied at run-time. */
1018 #define DF_1_NODIRECT 0x00020000 /* Object has no-direct binding. */
1171 though, since it does not work when using 32-bit definitions
1172 on 64-bit platforms and vice versa. */
1183 though, since it does not work when using 32-bit definitions
1184 on 64-bit platforms and vice versa. */
1209 #define AT_HWCAP 16 /* Machine-dependent hints about
1225 #define AT_SECURE 23 /* Boolean, was exec setuid-like? */
1231 #define AT_HWCAP2 26 /* More machine-dependent hints about
1244 /* Shapes of the caches. Bits 0-3 contains associativity; bits 4-7 contains
1248 #define AT_L2_CACHESHAPE 36
1320 Then follow variable-length entries, one byte followed by a
1321 '\0'-terminated hwcap name string. The byte gives the bit
1325 /* Build ID bits as generated by ld --build-id.
1349 /* A 4-byte unsigned integer property: A bit is set if it is set in all
1354 /* A 4-byte unsigned integer property: A bit is set if it is set in any
1366 /* Processor-specific semantics, lo */
1368 /* Processor-specific semantics, hi */
1370 /* Application-specific semantics, lo */
1372 /* Application-specific semantics, hi */
1387 /* X86 processor-specific features used in program. */
1394 CMPXCHG16B (cmpxchg16b), LAHF-SAHF (lahf), POPCNT (popcnt), SSE3,
1476 #define R_68K_TLS_LDO32 31 /* 32 bit module-relative offset */
1477 #define R_68K_TLS_LDO16 32 /* 16 bit module-relative offset */
1478 #define R_68K_TLS_LDO8 33 /* 8 bit module-relative offset */
1481 #define R_68K_TLS_IE8 36 /* 8 bit GOT offset for IE */
1489 #define R_68K_TLS_DTPREL32 41 /* 32 bit module-relative offset */
1490 #define R_68K_TLS_TPREL32 42 /* 32 bit TP-relative offset */
1544 #define R_386_TLS_DTPOFF32 36 /* Offset in TLS block */
1546 #define R_386_SIZE32 38 /* 32-bit symbol size */
1621 #define R_SPARC_LM22 36 /* Low middle 22 bits of ... */
1701 a 64-bit machine in 32-bit
1702 mode (regs are 32-bits
1704 #define EF_MIPS_FP64 512 /* Uses FP64 (12 callee-saved). */
1705 #define EF_MIPS_NAN2008 1024 /* Uses IEEE 754-2008 NaN encoding. */
1710 #define EF_MIPS_ARCH_ASE_M16 0x04000000 /* Use MIPS-16 ISA
1718 #define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
1719 #define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
1720 #define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
1721 #define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
1722 #define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
1853 Elf32_Word gt_current_g_value; /* -G value used for compilation. */
1858 Elf32_Word gt_g_value; /* If this value were used for -G. */
1881 Elf32_Word info; /* Kind-specific information. */
1914 #define OHW_R4KEOP 0x1 /* R4000 end-of-page patch. */
1916 #define OHW_R5KEOP 0x4 /* R5000 end-of-page patch. */
1972 #define R_MIPS_RELGOT 36
1975 #define R_MIPS_TLS_DTPREL32 39 /* Module-relative offset 32 bit */
1977 #define R_MIPS_TLS_DTPREL64 41 /* Module-relative offset 64 bit */
1980 #define R_MIPS_TLS_DTPREL_HI16 44 /* Module-relative offset, high 16 bits */
1981 #define R_MIPS_TLS_DTPREL_LO16 45 /* Module-relative offset, low 16 bits */
1983 #define R_MIPS_TLS_TPREL32 47 /* TP-relative offset, 32 bit */
1984 #define R_MIPS_TLS_TPREL64 48 /* TP-relative offset, 64 bit */
1985 #define R_MIPS_TLS_TPREL_HI16 49 /* TP-relative offset, high 16 bits */
1986 #define R_MIPS_TLS_TPREL_LO16 50 /* TP-relative offset, low 16 bits */
2116 /* The address of .got.plt in an executable using the new non-PIC ABI. */
2118 /* The base of the PLT in an executable using the new non-PIC ABI if that
2119 PLT is writable. For a non-writable PLT, this is omitted or has a zero
2126 /* GNU-style hash table with xlat. */
2188 /* The level of the ISA: 1-5, 32, 64. */
2190 /* The revision of ISA: 0 for MIPS V and below, 1-n otherwise. */
2194 /* The size of co-processor 1 registers. */
2196 /* The size of co-processor 2 registers. */
2198 /* The floating-point ABI. */
2200 /* Processor-specific extension. */
2212 #define MIPS_AFL_REG_32 0x01 /* 32-bit registers. */
2213 #define MIPS_AFL_REG_64 0x02 /* 64-bit registers. */
2214 #define MIPS_AFL_REG_128 0x03 /* 128-bit registers. */
2223 #define MIPS_AFL_ASE_MIPS3D 0x00000020 /* MIPS-3D ASE. */
2246 #define MIPS_AFL_EXT_SB1 12 /* Broadcom SB-1 instruction. */
2255 #define MIPS_AFL_FLAGS1_ODDSPREG 1 /* Uses odd single-precision registers. */
2262 /* Using hard-float -mdouble-float. */
2264 /* Using hard-float -msingle-float. */
2266 /* Using soft-float. */
2268 /* Using -mips32r2 -mfp64. */
2270 /* Using -mfpxx. */
2272 /* Using -mips32r2 -mfp64. */
2274 /* Using -mips32r2 -mfp64 -mno-odd-spreg. */
2295 #define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
2296 #define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
2297 #define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
2327 #define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
2332 #define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
2339 #define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */
2340 #define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */
2341 #define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */
2342 #define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */
2348 #define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */
2349 #define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */
2350 #define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */
2355 #define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */
2356 #define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */
2357 #define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */
2359 #define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */
2360 #define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */
2361 #define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */
2368 #define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */
2369 #define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */
2370 #define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */
2371 #define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */
2372 #define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */
2373 #define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */
2374 #define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */
2375 #define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */
2376 #define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */
2377 #define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */
2378 #define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */
2379 #define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */
2382 #define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */
2383 #define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */
2384 #define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */
2385 #define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */
2386 #define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */
2387 #define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */
2388 #define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */
2389 #define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */
2390 #define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */
2391 #define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */
2392 #define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */
2397 #define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */
2398 #define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */
2399 #define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */
2400 #define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */
2401 #define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/
2402 #define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */
2403 #define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */
2404 #define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */
2405 #define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */
2406 #define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */
2407 #define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */
2408 #define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */
2409 #define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */
2410 #define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/
2411 #define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/
2412 #define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */
2413 #define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */
2414 #define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */
2417 #define R_PARISC_TLS_GD21L 234 /* GD 21-bit left. */
2418 #define R_PARISC_TLS_GD14R 235 /* GD 14-bit right. */
2420 #define R_PARISC_TLS_LDM21L 237 /* LD module 21-bit left. */
2421 #define R_PARISC_TLS_LDM14R 238 /* LD module 14-bit right. */
2423 #define R_PARISC_TLS_LDO21L 240 /* LD offset 21-bit left. */
2424 #define R_PARISC_TLS_LDO14R 241 /* LD offset 14-bit right. */
2425 #define R_PARISC_TLS_DTPMOD32 242 /* DTP module 32-bit. */
2426 #define R_PARISC_TLS_DTPMOD64 243 /* DTP module 64-bit. */
2427 #define R_PARISC_TLS_DTPOFF32 244 /* DTP offset 32-bit. */
2428 #define R_PARISC_TLS_DTPOFF64 245 /* DTP offset 32-bit. */
2521 #define R_ALPHA_DTPREL16 36
2548 #define EF_PPC_RELOCATABLE 0x00010000 /* PowerPC -mrelocatable flag*/
2549 #define EF_PPC_RELOCATABLE_LIB 0x00008000 /* PowerPC -mrelocatable-lib
2589 #define R_PPC_SECTOFF_HA 36
2654 #define R_PPC_REL16 249 /* half16 (sym+add-.) */
2655 #define R_PPC_REL16_LO 250 /* half16 (sym+add-.)@l */
2656 #define R_PPC_REL16_HI 251 /* half16 (sym+add-.)@h */
2657 #define R_PPC_REL16_HA 252 /* half16 (sym+add-.)@ha */
2682 #define R_PPC64_REL24 R_PPC_REL24 /* PC-rel. 26 bit, word aligned */
2709 #define R_PPC64_ADDR30 37 /* word30 (S + A - P) >> 2 */
2716 #define R_PPC64_REL64 44 /* doubleword64 S + A - P */
2718 #define R_PPC64_PLTREL64 46 /* doubleword64 L + A - P */
2719 #define R_PPC64_TOC16 47 /* half16* S + A - .TOC */
2720 #define R_PPC64_TOC16_LO 48 /* half16 #lo(S + A - .TOC.) */
2721 #define R_PPC64_TOC16_HI 49 /* half16 #hi(S + A - .TOC.) */
2722 #define R_PPC64_TOC16_HA 50 /* half16 #ha(S + A - .TOC.) */
2736 #define R_PPC64_TOC16_DS 63 /* half16ds* (S + A - .TOC.) >> 2 */
2737 #define R_PPC64_TOC16_LO_DS 64 /* half16ds #lo(S + A - .TOC.) >> 2 */
2797 #define R_PPC64_REL16 249 /* half16 (sym+add-.) */
2798 #define R_PPC64_REL16_LO 250 /* half16 (sym+add-.)@l */
2799 #define R_PPC64_REL16_HI 251 /* half16 (sym+add-.)@h */
2800 #define R_PPC64_REL16_HA 252 /* half16 (sym+add-.)@ha */
2836 #define EF_ARM_ALIGN8 0x40 /* 8-bit structure alignment is in use */
2847 /* Other constants defined in the ARM ELF spec. version B-01. */
2870 /* ARM-specific values for sh_flags */
2875 /* ARM-specific program header flags */
2878 #define PF_ARM_PI 0x20000000 /* Position-independent segment. */
2901 #define R_AARCH64_P32_TLS_DTPREL 185 /* Module-relative offset, 32 bit. */
2902 #define R_AARCH64_P32_TLS_TPREL 186 /* TP-relative offset, 32 bit. */
2909 #define R_AARCH64_ABS16 259 /* Direct 16-bit. */
2910 #define R_AARCH64_PREL64 260 /* PC-relative 64-bit. */
2911 #define R_AARCH64_PREL32 261 /* PC-relative 32-bit. */
2912 #define R_AARCH64_PREL16 262 /* PC-relative 16-bit. */
2923 #define R_AARCH64_LD_PREL_LO19 273 /* PC-rel. LD imm. from bits 20:2. */
2924 #define R_AARCH64_ADR_PREL_LO21 274 /* PC-rel. ADR imm. from bits 20:0. */
2925 #define R_AARCH64_ADR_PREL_PG_HI21 275 /* Page-rel. ADRP imm. from 32:12. */
2929 #define R_AARCH64_TSTBR14 279 /* PC-rel. TBZ/TBNZ imm. from 15:2. */
2930 #define R_AARCH64_CONDBR19 280 /* PC-rel. cond. br. imm. from 20:2. */
2931 #define R_AARCH64_JUMP26 282 /* PC-rel. B imm. from bits 27:2. */
2936 #define R_AARCH64_MOVW_PREL_G0 287 /* PC-rel. MOV{N,Z} imm. from 15:0. */
2938 #define R_AARCH64_MOVW_PREL_G1 289 /* PC-rel. MOV{N,Z} imm. from 31:16. */
2940 #define R_AARCH64_MOVW_PREL_G2 291 /* PC-rel. MOV{N,Z} imm. from 47:32. */
2942 #define R_AARCH64_MOVW_PREL_G3 293 /* PC-rel. MOV{N,Z} imm. from 63:48. */
2944 #define R_AARCH64_MOVW_GOTOFF_G0 300 /* GOT-rel. off. MOV{N,Z} imm. 15:0. */
2946 #define R_AARCH64_MOVW_GOTOFF_G1 302 /* GOT-rel. o. MOV{N,Z} imm. 31:16. */
2948 #define R_AARCH64_MOVW_GOTOFF_G2 304 /* GOT-rel. o. MOV{N,Z} imm. 47:32. */
2950 #define R_AARCH64_MOVW_GOTOFF_G3 306 /* GOT-rel. o. MOV{N,Z} imm. 63:48. */
2951 #define R_AARCH64_GOTREL64 307 /* GOT-relative 64-bit. */
2952 #define R_AARCH64_GOTREL32 308 /* GOT-relative 32-bit. */
2953 #define R_AARCH64_GOT_LD_PREL19 309 /* PC-rel. GOT off. load imm. 20:2. */
2954 #define R_AARCH64_LD64_GOTOFF_LO15 310 /* GOT-rel. off. LD/ST imm. 14:3. */
2955 #define R_AARCH64_ADR_GOT_PAGE 311 /* P-page-rel. GOT off. ADRP 32:12. */
2957 #define R_AARCH64_LD64_GOTPAGE_LO15 313 /* GOT-page-rel. GOT off. LD/ST 14:3 */
2958 #define R_AARCH64_TLSGD_ADR_PREL21 512 /* PC-relative ADR imm. 20:0. */
2959 #define R_AARCH64_TLSGD_ADR_PAGE21 513 /* page-rel. ADRP imm. 32:12. */
2961 #define R_AARCH64_TLSGD_MOVW_G1 515 /* GOT-rel. MOV{N,Z} 31:16. */
2962 #define R_AARCH64_TLSGD_MOVW_G0_NC 516 /* GOT-rel. MOVK imm. 15:0. */
2968 #define R_AARCH64_TLSLD_LD_PREL19 522 /* TLS PC-rel. load imm. 20:2. */
2969 #define R_AARCH64_TLSLD_MOVW_DTPREL_G2 523 /* TLS DTP-rel. MOV{N,Z} 47:32. */
2970 #define R_AARCH64_TLSLD_MOVW_DTPREL_G1 524 /* TLS DTP-rel. MOV{N,Z} 31:16. */
2972 #define R_AARCH64_TLSLD_MOVW_DTPREL_G0 526 /* TLS DTP-rel. MOV{N,Z} 15:0. */
2974 #define R_AARCH64_TLSLD_ADD_DTPREL_HI12 528 /* DTP-rel. ADD imm. from 23:12. */
2975 #define R_AARCH64_TLSLD_ADD_DTPREL_LO12 529 /* DTP-rel. ADD imm. from 11:0. */
2977 #define R_AARCH64_TLSLD_LDST8_DTPREL_LO12 531 /* DTP-rel. LD/ST imm. 11:0. */
2979 #define R_AARCH64_TLSLD_LDST16_DTPREL_LO12 533 /* DTP-rel. LD/ST imm. 11:1. */
2981 #define R_AARCH64_TLSLD_LDST32_DTPREL_LO12 535 /* DTP-rel. LD/ST imm. 11:2. */
2983 #define R_AARCH64_TLSLD_LDST64_DTPREL_LO12 537 /* DTP-rel. LD/ST imm. 11:3. */
2985 #define R_AARCH64_TLSIE_MOVW_GOTTPREL_G1 539 /* GOT-rel. MOV{N,Z} 31:16. */
2986 #define R_AARCH64_TLSIE_MOVW_GOTTPREL_G0_NC 540 /* GOT-rel. MOVK 15:0. */
2987 #define R_AARCH64_TLSIE_ADR_GOTTPREL_PAGE21 541 /* Page-rel. ADRP 32:12. */
2989 #define R_AARCH64_TLSIE_LD_GOTTPREL_PREL19 543 /* PC-rel. load imm. 20:2. */
2990 #define R_AARCH64_TLSLE_MOVW_TPREL_G2 544 /* TLS TP-rel. MOV{N,Z} 47:32. */
2991 #define R_AARCH64_TLSLE_MOVW_TPREL_G1 545 /* TLS TP-rel. MOV{N,Z} 31:16. */
2993 #define R_AARCH64_TLSLE_MOVW_TPREL_G0 547 /* TLS TP-rel. MOV{N,Z} 15:0. */
2995 #define R_AARCH64_TLSLE_ADD_TPREL_HI12 549 /* TP-rel. ADD imm. 23:12. */
2996 #define R_AARCH64_TLSLE_ADD_TPREL_LO12 550 /* TP-rel. ADD imm. 11:0. */
2998 #define R_AARCH64_TLSLE_LDST8_TPREL_LO12 552 /* TP-rel. LD/ST off. 11:0. */
3000 #define R_AARCH64_TLSLE_LDST16_TPREL_LO12 554 /* TP-rel. LD/ST off. 11:1. */
3002 #define R_AARCH64_TLSLE_LDST32_TPREL_LO12 556 /* TP-rel. LD/ST off. 11:2. */
3004 #define R_AARCH64_TLSLE_LDST64_TPREL_LO12 558 /* TP-rel. LD/ST off. 11:3. */
3006 #define R_AARCH64_TLSDESC_LD_PREL19 560 /* PC-rel. load immediate 20:2. */
3007 #define R_AARCH64_TLSDESC_ADR_PREL21 561 /* PC-rel. ADR immediate 20:0. */
3008 #define R_AARCH64_TLSDESC_ADR_PAGE21 562 /* Page-rel. ADRP imm. 32:12. */
3011 #define R_AARCH64_TLSDESC_OFF_G1 565 /* GOT-rel. MOV{N,Z} imm. 31:16. */
3012 #define R_AARCH64_TLSDESC_OFF_G0_NC 566 /* GOT-rel. MOVK imm. 15:0; no ck. */
3016 #define R_AARCH64_TLSLE_LDST128_TPREL_LO12 570 /* TP-rel. LD/ST off. 11:4. */
3018 #define R_AARCH64_TLSLD_LDST128_DTPREL_LO12 572 /* DTP-rel. LD/ST imm. 11:4. */
3025 #define R_AARCH64_TLS_DTPREL 1029 /* Module-relative offset, 64 bit. */
3026 #define R_AARCH64_TLS_TPREL 1030 /* TP-relative offset, 64 bit. */
3084 #define R_ARM_ALU_SBREL_19_12 36 /* Deprecated, prog. base relative. */
3091 #define R_ARM_MOVW_ABS_NC 43 /* Direct 16-bit (MOVW). */
3092 #define R_ARM_MOVT_ABS 44 /* Direct high 16-bit (MOVT). */
3093 #define R_ARM_MOVW_PREL_NC 45 /* PC relative 16-bit (MOVW). */
3110 #define R_ARM_ABS32_NOI 55 /* Direct 32-bit. */
3111 #define R_ARM_REL32_NOI 56 /* PC relative 32-bit. */
3177 #define R_ARM_TLS_GD32 104 /* PC-rel 32 bit for global dynamic
3179 #define R_ARM_TLS_LDM32 105 /* PC-rel 32 bit for local dynamic
3183 #define R_ARM_TLS_IE32 107 /* PC-rel 32 bit for GOT entry of
3210 /* C-SKY */
3213 #define R_CKCORE_PCRELIMM8BY4 2 /* disp ((S + A - P) >> 2) & 0xff */
3214 #define R_CKCORE_PCRELIMM11BY2 3 /* disp ((S + A - P) >> 1) & 0x7ff */
3215 #define R_CKCORE_PCREL32 5 /* 32-bit rel (S + A - P) */
3216 #define R_CKCORE_PCRELJSR_IMM11BY2 6 /* disp ((S + A - P) >>1) & 0x7ff */
3221 #define R_CKCORE_GOTOFF 13 /* offset to GOT (S + A - GOT) */
3222 #define R_CKCORE_GOTPC 14 /* PC offset to GOT (GOT + A - P) */
3227 #define R_CKCORE_PCREL_IMM26BY2 19 /* ((S + A - P) >> 1) & 0x3ffffff */
3228 #define R_CKCORE_PCREL_IMM16BY2 20 /* disp ((S + A - P) >> 1) & 0xffff */
3229 #define R_CKCORE_PCREL_IMM16BY4 21 /* disp ((S + A - P) >> 2) & 0xffff */
3230 #define R_CKCORE_PCREL_IMM10BY2 22 /* disp ((S + A - P) >> 1) & 0x3ff */
3231 #define R_CKCORE_PCREL_IMM10BY4 23 /* disp ((S + A - P) >> 2) & 0x3ff */
3236 /* ((GOT + A - P) >> 16) & 0xffff */
3237 #define R_CKCORE_GOTPC_LO16 27 /* (GOT + A - P) & 0xffff */
3239 /* ((S + A - GOT) >> 16) & 0xffff */
3240 #define R_CKCORE_GOTOFF_LO16 29 /* (S + A - GOT) & 0xffff */
3249 #define R_CKCORE_ADDRGOT_HI16 36 /* high & low 16 bit ADDRGOT */
3255 #define R_CKCORE_PCREL_JSR_IMM26BY2 40 /* disp ((S+A-P) >>1) & x3ffffff */
3256 #define R_CKCORE_TOFFSET_LO16 41 /* (S+A-BTEXT) & 0xffff */
3257 #define R_CKCORE_DOFFSET_LO16 42 /* (S+A-BTEXT) & 0xffff */
3258 #define R_CKCORE_PCREL_IMM18BY2 43 /* disp ((S+A-P) >>1) & 0x3ffff */
3259 #define R_CKCORE_DOFFSET_IMM18 44 /* disp (S+A-BDATA) & 0x3ffff */
3260 #define R_CKCORE_DOFFSET_IMM18BY2 45 /* disp ((S+A-BDATA)>>1) & 0x3ffff */
3261 #define R_CKCORE_DOFFSET_IMM18BY4 46 /* disp ((S+A-BDATA)>>2) & 0x3ffff */
3264 #define R_CKCORE_PCREL_IMM7BY4 50 /* disp ((S+A-P) >>2) & 0x7f */
3274 /* C-SKY elf header definition. */
3282 /* C-SKY attributes section. */
3285 /* IA-64 specific declarations. */
3288 #define EF_IA_64_MASKOS 0x0000000f /* os-specific flags */
3289 #define EF_IA_64_ABI64 0x00000010 /* 64-bit ABI */
3314 /* IA-64 relocations. */
3508 #define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */
3581 /* AMD x86-64 relocations. */
3614 #define R_X86_64_GOT64 27 /* 64-bit GOT entry offset */
3615 #define R_X86_64_GOTPCREL64 28 /* 64-bit PC relative offset
3617 #define R_X86_64_GOTPC64 29 /* 64-bit PC relative offset to GOT */
3619 #define R_X86_64_PLTOFF64 31 /* 64-bit GOT relative offset
3621 #define R_X86_64_SIZE32 32 /* Size of symbol plus 32-bit addend */
3622 #define R_X86_64_SIZE64 33 /* Size of symbol plus 64-bit addend */
3626 #define R_X86_64_TLSDESC 36 /* TLS descriptor. */
3628 #define R_X86_64_RELATIVE64 38 /* 64-bit adjust by program base */
3639 /* x86-64 sh_type values. */
3642 /* x86-64 d_tag values. */
3653 #define R_MN10300_PCREL32 4 /* PC-relative 32-bit. */
3654 #define R_MN10300_PCREL16 5 /* PC-relative 16-bit signed. */
3655 #define R_MN10300_PCREL8 6 /* PC-relative 8-bit signed. */
3659 #define R_MN10300_GOTPC32 10 /* 32-bit PCrel offset to GOT. */
3660 #define R_MN10300_GOTPC16 11 /* 16-bit PCrel offset to GOT. */
3661 #define R_MN10300_GOTOFF32 12 /* 32-bit offset from GOT. */
3662 #define R_MN10300_GOTOFF24 13 /* 24-bit offset from GOT. */
3663 #define R_MN10300_GOTOFF16 14 /* 16-bit offset from GOT. */
3664 #define R_MN10300_PLT32 15 /* 32-bit PCrel to PLT entry. */
3665 #define R_MN10300_PLT16 16 /* 16-bit PCrel to PLT entry. */
3666 #define R_MN10300_GOT32 17 /* 32-bit offset to GOT entry. */
3667 #define R_MN10300_GOT24 18 /* 24-bit offset to GOT entry. */
3668 #define R_MN10300_GOT16 19 /* 16-bit offset to GOT entry. */
3673 #define R_MN10300_TLS_GD 24 /* 32-bit offset for global dynamic. */
3674 #define R_MN10300_TLS_LD 25 /* 32-bit offset for local dynamic. */
3675 #define R_MN10300_TLS_LDO 26 /* Module-relative offset. */
3710 #define R_M32R_10_PCREL_RELA 36 /* PC relative 10 bit shifted. */
3755 #define R_MICROBLAZE_SRO32 7 /* Read-only small data area. */
3756 #define R_MICROBLAZE_SRW32 8 /* Read-write small data area. */
3761 #define R_MICROBLAZE_GOTPC_64 13 /* PC-relative GOT offset. */
3763 #define R_MICROBLAZE_PLT_64 15 /* PLT offset (PC-relative). */
3816 #define R_NIOS2_TLS_LE16 32 /* 16 bit LE TP-relative offset. */
3818 #define R_NIOS2_TLS_DTPREL 34 /* Module-relative offset. */
3819 #define R_NIOS2_TLS_TPREL 35 /* TP-relative offset. */
3820 #define R_NIOS2_COPY 36 /* Copy symbol at runtime. */
3849 #define R_TILEPRO_IMM8_X0 17 /* X0 pipe 8-bit */
3850 #define R_TILEPRO_IMM8_Y0 18 /* Y0 pipe 8-bit */
3851 #define R_TILEPRO_IMM8_X1 19 /* X1 pipe 8-bit */
3852 #define R_TILEPRO_IMM8_Y1 20 /* Y1 pipe 8-bit */
3855 #define R_TILEPRO_IMM16_X0 23 /* X0 pipe 16-bit */
3856 #define R_TILEPRO_IMM16_X1 24 /* X1 pipe 16-bit */
3857 #define R_TILEPRO_IMM16_X0_LO 25 /* X0 pipe low 16-bit */
3858 #define R_TILEPRO_IMM16_X1_LO 26 /* X1 pipe low 16-bit */
3859 #define R_TILEPRO_IMM16_X0_HI 27 /* X0 pipe high 16-bit */
3860 #define R_TILEPRO_IMM16_X1_HI 28 /* X1 pipe high 16-bit */
3861 #define R_TILEPRO_IMM16_X0_HA 29 /* X0 pipe high 16-bit, adjusted */
3862 #define R_TILEPRO_IMM16_X1_HA 30 /* X1 pipe high 16-bit, adjusted */
3868 #define R_TILEPRO_IMM16_X1_HI_PCREL 36 /* X1 pipe PC relative high 16 bit */
3871 #define R_TILEPRO_IMM16_X0_GOT 39 /* X0 pipe 16-bit GOT offset */
3872 #define R_TILEPRO_IMM16_X1_GOT 40 /* X1 pipe 16-bit GOT offset */
3873 #define R_TILEPRO_IMM16_X0_GOT_LO 41 /* X0 pipe low 16-bit GOT offset */
3874 #define R_TILEPRO_IMM16_X1_GOT_LO 42 /* X1 pipe low 16-bit GOT offset */
3875 #define R_TILEPRO_IMM16_X0_GOT_HI 43 /* X0 pipe high 16-bit GOT offset */
3876 #define R_TILEPRO_IMM16_X1_GOT_HI 44 /* X1 pipe high 16-bit GOT offset */
3877 #define R_TILEPRO_IMM16_X0_GOT_HA 45 /* X0 pipe ha() 16-bit GOT offset */
3878 #define R_TILEPRO_IMM16_X1_GOT_HA 46 /* X1 pipe ha() 16-bit GOT offset */
3887 #define R_TILEPRO_DEST_IMM8_X1 55 /* X1 pipe destination 8-bit */
3888 /* Relocs 56-59 are currently not defined. */
3895 #define R_TILEPRO_IMM16_X0_TLS_GD 66 /* X0 pipe 16-bit TLS GD offset */
3896 #define R_TILEPRO_IMM16_X1_TLS_GD 67 /* X1 pipe 16-bit TLS GD offset */
3897 #define R_TILEPRO_IMM16_X0_TLS_GD_LO 68 /* X0 pipe low 16-bit TLS GD offset */
3898 #define R_TILEPRO_IMM16_X1_TLS_GD_LO 69 /* X1 pipe low 16-bit TLS GD offset */
3899 #define R_TILEPRO_IMM16_X0_TLS_GD_HI 70 /* X0 pipe high 16-bit TLS GD offset */
3900 #define R_TILEPRO_IMM16_X1_TLS_GD_HI 71 /* X1 pipe high 16-bit TLS GD offset */
3901 #define R_TILEPRO_IMM16_X0_TLS_GD_HA 72 /* X0 pipe ha() 16-bit TLS GD offset */
3902 #define R_TILEPRO_IMM16_X1_TLS_GD_HA 73 /* X1 pipe ha() 16-bit TLS GD offset */
3903 #define R_TILEPRO_IMM16_X0_TLS_IE 74 /* X0 pipe 16-bit TLS IE offset */
3904 #define R_TILEPRO_IMM16_X1_TLS_IE 75 /* X1 pipe 16-bit TLS IE offset */
3905 #define R_TILEPRO_IMM16_X0_TLS_IE_LO 76 /* X0 pipe low 16-bit TLS IE offset */
3906 #define R_TILEPRO_IMM16_X1_TLS_IE_LO 77 /* X1 pipe low 16-bit TLS IE offset */
3907 #define R_TILEPRO_IMM16_X0_TLS_IE_HI 78 /* X0 pipe high 16-bit TLS IE offset */
3908 #define R_TILEPRO_IMM16_X1_TLS_IE_HI 79 /* X1 pipe high 16-bit TLS IE offset */
3909 #define R_TILEPRO_IMM16_X0_TLS_IE_HA 80 /* X0 pipe ha() 16-bit TLS IE offset */
3910 #define R_TILEPRO_IMM16_X1_TLS_IE_HA 81 /* X1 pipe ha() 16-bit TLS IE offset */
3914 #define R_TILEPRO_IMM16_X0_TLS_LE 85 /* X0 pipe 16-bit TLS LE offset */
3915 #define R_TILEPRO_IMM16_X1_TLS_LE 86 /* X1 pipe 16-bit TLS LE offset */
3916 #define R_TILEPRO_IMM16_X0_TLS_LE_LO 87 /* X0 pipe low 16-bit TLS LE offset */
3917 #define R_TILEPRO_IMM16_X1_TLS_LE_LO 88 /* X1 pipe low 16-bit TLS LE offset */
3918 #define R_TILEPRO_IMM16_X0_TLS_LE_HI 89 /* X0 pipe high 16-bit TLS LE offset */
3919 #define R_TILEPRO_IMM16_X1_TLS_LE_HI 90 /* X1 pipe high 16-bit TLS LE offset */
3920 #define R_TILEPRO_IMM16_X0_TLS_LE_HA 91 /* X0 pipe ha() 16-bit TLS LE offset */
3921 #define R_TILEPRO_IMM16_X1_TLS_LE_HA 92 /* X1 pipe ha() 16-bit TLS LE offset */
3929 /* TILE-Gx relocations. */
3939 #define R_TILEGX_HW0 9 /* hword 0 16-bit */
3940 #define R_TILEGX_HW1 10 /* hword 1 16-bit */
3941 #define R_TILEGX_HW2 11 /* hword 2 16-bit */
3942 #define R_TILEGX_HW3 12 /* hword 3 16-bit */
3943 #define R_TILEGX_HW0_LAST 13 /* last hword 0 16-bit */
3944 #define R_TILEGX_HW1_LAST 14 /* last hword 1 16-bit */
3945 #define R_TILEGX_HW2_LAST 15 /* last hword 2 16-bit */
3953 #define R_TILEGX_IMM8_X0 23 /* X0 pipe 8-bit */
3954 #define R_TILEGX_IMM8_Y0 24 /* Y0 pipe 8-bit */
3955 #define R_TILEGX_IMM8_X1 25 /* X1 pipe 8-bit */
3956 #define R_TILEGX_IMM8_Y1 26 /* Y1 pipe 8-bit */
3957 #define R_TILEGX_DEST_IMM8_X1 27 /* X1 pipe destination 8-bit */
3966 #define R_TILEGX_IMM16_X0_HW0 36 /* X0 pipe hword 0 */
3988 #define R_TILEGX_IMM16_X0_HW0_LAST_PCREL 58 /* X0 pipe PC-rel last hword 0 */
3989 #define R_TILEGX_IMM16_X1_HW0_LAST_PCREL 59 /* X1 pipe PC-rel last hword 0 */
3990 #define R_TILEGX_IMM16_X0_HW1_LAST_PCREL 60 /* X0 pipe PC-rel last hword 1 */
3991 #define R_TILEGX_IMM16_X1_HW1_LAST_PCREL 61 /* X1 pipe PC-rel last hword 1 */
3992 #define R_TILEGX_IMM16_X0_HW2_LAST_PCREL 62 /* X0 pipe PC-rel last hword 2 */
3993 #define R_TILEGX_IMM16_X1_HW2_LAST_PCREL 63 /* X1 pipe PC-rel last hword 2 */
3996 #define R_TILEGX_IMM16_X0_HW0_PLT_PCREL 66 /* X0 pipe PC-rel PLT hword 0 */
3997 #define R_TILEGX_IMM16_X1_HW0_PLT_PCREL 67 /* X1 pipe PC-rel PLT hword 0 */
3998 #define R_TILEGX_IMM16_X0_HW1_PLT_PCREL 68 /* X0 pipe PC-rel PLT hword 1 */
3999 #define R_TILEGX_IMM16_X1_HW1_PLT_PCREL 69 /* X1 pipe PC-rel PLT hword 1 */
4000 #define R_TILEGX_IMM16_X0_HW2_PLT_PCREL 70 /* X0 pipe PC-rel PLT hword 2 */
4001 #define R_TILEGX_IMM16_X1_HW2_PLT_PCREL 71 /* X1 pipe PC-rel PLT hword 2 */
4006 #define R_TILEGX_IMM16_X0_HW3_PLT_PCREL 76 /* X0 pipe PC-rel PLT hword 3 */
4007 #define R_TILEGX_IMM16_X1_HW3_PLT_PCREL 77 /* X1 pipe PC-rel PLT hword 3 */
4020 /* Relocs 90-91 are currently not defined. */
4023 #define R_TILEGX_IMM16_X0_HW0_LAST_PLT_PCREL 94 /* X0 pipe PC-rel PLT last hword 0 */
4024 #define R_TILEGX_IMM16_X1_HW0_LAST_PLT_PCREL 95 /* X1 pipe PC-rel PLT last hword 0 */
4025 #define R_TILEGX_IMM16_X0_HW1_LAST_PLT_PCREL 96 /* X0 pipe PC-rel PLT last hword 1 */
4026 #define R_TILEGX_IMM16_X1_HW1_LAST_PLT_PCREL 97 /* X1 pipe PC-rel PLT last hword 1 */
4027 #define R_TILEGX_IMM16_X0_HW2_LAST_PLT_PCREL 98 /* X0 pipe PC-rel PLT last hword 2 */
4028 #define R_TILEGX_IMM16_X1_HW2_LAST_PLT_PCREL 99 /* X1 pipe PC-rel PLT last hword 2 */
4033 /* Relocs 104-105 are currently not defined. */
4034 #define R_TILEGX_TLS_DTPMOD64 106 /* 64-bit ID of symbol's module */
4035 #define R_TILEGX_TLS_DTPOFF64 107 /* 64-bit offset in TLS block */
4036 #define R_TILEGX_TLS_TPOFF64 108 /* 64-bit offset in static TLS block */
4037 #define R_TILEGX_TLS_DTPMOD32 109 /* 32-bit ID of symbol's module */
4038 #define R_TILEGX_TLS_DTPOFF32 110 /* 32-bit offset in TLS block */
4039 #define R_TILEGX_TLS_TPOFF32 111 /* 32-bit offset in static TLS block */
4056 /* RISC-V ELF Flags */
4066 /* RISC-V relocations. */
4099 #define R_RISCV_ADD64 36
4128 /* RISC-V specific values for the st_other field. */
4132 /* RISC-V specific values for the sh_type field. */
4135 /* RISC-V specific values for the p_type field. */
4138 /* RISC-V specific values for the d_tag field. */
4180 #define R_METAG_HI16_GOTPC 36
4260 #define R_LARCH_SOP_AND 36
4286 /* reserved 59-63 */