Lines Matching full:way

67 	 * Data cache operations by set/way to the level specified
111 	ubfx	x4, x1, #3, #10		// maximum way number
112 	clz	w5, w4			// bit position of way size increment
113 	lsl	w9, w4, w5		// w9 = aligned max way number
114 	lsl	w16, w8, w5		// w16 = way number loop decrement
115 	orr	w9, w10, w9		// w9 = combine way and cache number
129 	orr	w11, w9, w7		// combine cache, way and set number
134 	subs	x9, x9, x16		// decrement way number
167 	 *  Helper macro for data cache operations by set/way for the
179 	 * Data cache operations by set/way for level 1 cache
190 	 * Data cache operations by set/way for level 2 cache
201 	 * Data cache operations by set/way for level 3 cache