Lines Matching defs:input_offset
180 TEST(QC8_DWCONV_MINMAX_FP32_UP8X3__AARCH32_NEONV8_MLA8_CORTEX_A35, input_offset) { in TEST() argument
366 TEST(QC8_DWCONV_MINMAX_FP32_UP8X3__NEON_MLA8_LD64, input_offset) { in TEST() argument
552 TEST(QC8_DWCONV_MINMAX_FP32_UP8X3__NEONV8_MLA8_LD64, input_offset) { in TEST() argument
738 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__NEON_MLA8_LD64, input_offset) { in TEST() argument
924 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__NEON_MUL8_LD64, input_offset) { in TEST() argument
1110 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__NEON_MUL16, input_offset) { in TEST() argument
1296 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__NEONV8_MLA8_LD64, input_offset) { in TEST() argument
1482 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__NEONV8_MUL8_LD64, input_offset) { in TEST() argument
1668 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__NEONV8_MUL16, input_offset) { in TEST() argument
1854 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__NEON_MLA8_LD64, input_offset) { in TEST() argument
2040 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__NEON_MUL8_LD64, input_offset) { in TEST() argument
2226 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__NEON_MUL16, input_offset) { in TEST() argument
2412 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__NEONV8_MLA8_LD64, input_offset) { in TEST() argument
2598 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__NEONV8_MUL8_LD64, input_offset) { in TEST() argument
2784 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__NEONV8_MUL16, input_offset) { in TEST() argument
2970 TEST(QC8_DWCONV_MINMAX_FP32_UP16X3__AARCH32_NEONV8_MLA8_CORTEX_A35, input_offset) { in TEST() argument
3156 TEST(QC8_DWCONV_MINMAX_FP32_UP16X3__NEON_MLA8_LD64, input_offset) { in TEST() argument
3342 TEST(QC8_DWCONV_MINMAX_FP32_UP16X3__NEON_MLA8_LD128, input_offset) { in TEST() argument
3528 TEST(QC8_DWCONV_MINMAX_FP32_UP16X3__NEONV8_MLA8_LD64, input_offset) { in TEST() argument
3714 TEST(QC8_DWCONV_MINMAX_FP32_UP16X3__NEONV8_MLA8_LD128, input_offset) { in TEST() argument
3900 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__NEON_MLA8_LD64, input_offset) { in TEST() argument
4086 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__NEON_MLA8_LD128, input_offset) { in TEST() argument
4272 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__NEON_MUL8_LD64, input_offset) { in TEST() argument
4458 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__NEON_MUL8_LD128, input_offset) { in TEST() argument
4644 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__NEON_MUL16, input_offset) { in TEST() argument
4830 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__NEONV8_MLA8_LD64, input_offset) { in TEST() argument
5016 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__NEONV8_MLA8_LD128, input_offset) { in TEST() argument
5202 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__NEONV8_MUL8_LD64, input_offset) { in TEST() argument
5388 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__NEONV8_MUL8_LD128, input_offset) { in TEST() argument
5574 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__NEONV8_MUL16, input_offset) { in TEST() argument
5760 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__NEON_MLA8_LD64, input_offset) { in TEST() argument
5946 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__NEON_MLA8_LD128, input_offset) { in TEST() argument
6132 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__NEON_MUL8_LD64, input_offset) { in TEST() argument
6318 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__NEON_MUL8_LD128, input_offset) { in TEST() argument
6504 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__NEON_MUL16, input_offset) { in TEST() argument
6690 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__NEONV8_MLA8_LD64, input_offset) { in TEST() argument
6876 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__NEONV8_MLA8_LD128, input_offset) { in TEST() argument
7062 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__NEONV8_MUL8_LD64, input_offset) { in TEST() argument
7248 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__NEONV8_MUL8_LD128, input_offset) { in TEST() argument
7434 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__NEONV8_MUL16, input_offset) { in TEST() argument
7620 TEST(QC8_DWCONV_MINMAX_FP32_UP24X9__NEON_MUL16, input_offset) { in TEST() argument
7806 TEST(QC8_DWCONV_MINMAX_FP32_UP24X9__NEONV8_MUL16, input_offset) { in TEST() argument
7992 TEST(QC8_DWCONV_MINMAX_FP32_UP24X25__NEON_MUL16, input_offset) { in TEST() argument
8178 TEST(QC8_DWCONV_MINMAX_FP32_UP24X25__NEONV8_MUL16, input_offset) { in TEST() argument
8364 TEST(QC8_DWCONV_MINMAX_FP32_UP32X9__NEON_MUL16, input_offset) { in TEST() argument
8550 TEST(QC8_DWCONV_MINMAX_FP32_UP32X9__NEONV8_MUL16, input_offset) { in TEST() argument
8736 TEST(QC8_DWCONV_MINMAX_FP32_UP32X25__NEON_MUL16, input_offset) { in TEST() argument
8922 TEST(QC8_DWCONV_MINMAX_FP32_UP32X25__NEONV8_MUL16, input_offset) { in TEST() argument
9108 TEST(QC8_DWCONV_MINMAX_FP32_UP8X3__SSE2_MUL16, input_offset) { in TEST() argument
9294 TEST(QC8_DWCONV_MINMAX_FP32_UP8X3__SSE41_MUL16, input_offset) { in TEST() argument
9480 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__SSE2_MUL16, input_offset) { in TEST() argument
9666 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__SSE2_MUL16_ADD16, input_offset) { in TEST() argument
9852 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__SSE41_MUL16, input_offset) { in TEST() argument
10038 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__SSE41_MUL16_ADD16, input_offset) { in TEST() argument
10224 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__SSE41_MUL32, input_offset) { in TEST() argument
10410 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__SSE2_MUL16, input_offset) { in TEST() argument
10596 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__SSE2_MUL16_ADD16, input_offset) { in TEST() argument
10782 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__SSE41_MUL16, input_offset) { in TEST() argument
10968 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__SSE41_MUL16_ADD16, input_offset) { in TEST() argument
11154 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__SSE41_MUL32, input_offset) { in TEST() argument
11340 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__SSE2_MUL16, input_offset) { in TEST() argument
11526 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__SSE2_MUL16_ADD16, input_offset) { in TEST() argument
11712 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__SSE41_MUL16, input_offset) { in TEST() argument
11898 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__SSE41_MUL16_ADD16, input_offset) { in TEST() argument
12084 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__SSE41_MUL32, input_offset) { in TEST() argument
12270 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__SSE2_MUL16, input_offset) { in TEST() argument
12456 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__SSE2_MUL16_ADD16, input_offset) { in TEST() argument
12642 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__SSE41_MUL16, input_offset) { in TEST() argument
12828 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__SSE41_MUL16_ADD16, input_offset) { in TEST() argument
13014 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__SSE41_MUL32, input_offset) { in TEST() argument
13200 TEST(QC8_DWCONV_MINMAX_FP32_UP24X9__SSE2_MUL16, input_offset) { in TEST() argument
13386 TEST(QC8_DWCONV_MINMAX_FP32_UP24X9__SSE41_MUL16, input_offset) { in TEST() argument
13572 TEST(QC8_DWCONV_MINMAX_FP32_UP24X9__SSE41_MUL32, input_offset) { in TEST() argument
13758 TEST(QC8_DWCONV_MINMAX_FP32_UP24X25__SSE2_MUL16, input_offset) { in TEST() argument
13944 TEST(QC8_DWCONV_MINMAX_FP32_UP24X25__SSE41_MUL16, input_offset) { in TEST() argument
14130 TEST(QC8_DWCONV_MINMAX_FP32_UP24X25__SSE41_MUL32, input_offset) { in TEST() argument
14316 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__AVX_MUL16, input_offset) { in TEST() argument
14502 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__AVX_MUL16_ADD16, input_offset) { in TEST() argument
14688 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__AVX_MUL32, input_offset) { in TEST() argument
14874 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__AVX2_MUL32, input_offset) { in TEST() argument
15060 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__XOP_MUL16_ADD16, input_offset) { in TEST() argument
15246 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__XOP_MUL32, input_offset) { in TEST() argument
15432 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__AVX_MUL16, input_offset) { in TEST() argument
15618 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__AVX_MUL16_ADD16, input_offset) { in TEST() argument
15804 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__AVX_MUL32, input_offset) { in TEST() argument
15990 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__AVX2_MUL32, input_offset) { in TEST() argument
16176 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__XOP_MUL16_ADD16, input_offset) { in TEST() argument
16362 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__XOP_MUL32, input_offset) { in TEST() argument
16548 TEST(QC8_DWCONV_MINMAX_FP32_UP16X3__AVX_MUL16_ADD16, input_offset) { in TEST() argument
16734 TEST(QC8_DWCONV_MINMAX_FP32_UP16X3__AVX2_MUL32, input_offset) { in TEST() argument
16920 TEST(QC8_DWCONV_MINMAX_FP32_UP16X3__XOP_MUL16_ADD16, input_offset) { in TEST() argument
17106 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__AVX_MUL16, input_offset) { in TEST() argument
17292 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__AVX_MUL16_ADD16, input_offset) { in TEST() argument
17478 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__AVX_MUL32, input_offset) { in TEST() argument
17664 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__AVX2_MUL16_ADD16_VPUNPCK, input_offset) { in TEST() argument
17850 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__AVX2_MUL16_VPMOVSX, input_offset) { in TEST() argument
18036 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__AVX2_MUL16_VPUNPCK, input_offset) { in TEST() argument
18222 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__AVX2_MUL32, input_offset) { in TEST() argument
18408 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__XOP_MUL16_ADD16, input_offset) { in TEST() argument
18594 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__XOP_MUL32, input_offset) { in TEST() argument
18780 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__AVX_MUL16, input_offset) { in TEST() argument
18966 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__AVX_MUL16_ADD16, input_offset) { in TEST() argument
19152 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__AVX_MUL32, input_offset) { in TEST() argument
19338 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__AVX2_MUL16_ADD16_VPUNPCK, input_offset) { in TEST() argument
19524 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__AVX2_MUL16_VPMOVSX, input_offset) { in TEST() argument
19710 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__AVX2_MUL16_VPUNPCK, input_offset) { in TEST() argument
19896 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__AVX2_MUL32, input_offset) { in TEST() argument
20082 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__XOP_MUL16_ADD16, input_offset) { in TEST() argument
20268 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__XOP_MUL32, input_offset) { in TEST() argument
20454 TEST(QC8_DWCONV_MINMAX_FP32_UP24X9__AVX_MUL16, input_offset) { in TEST() argument
20640 TEST(QC8_DWCONV_MINMAX_FP32_UP24X9__AVX_MUL32, input_offset) { in TEST() argument
20826 TEST(QC8_DWCONV_MINMAX_FP32_UP24X9__AVX2_MUL32, input_offset) { in TEST() argument
21012 TEST(QC8_DWCONV_MINMAX_FP32_UP24X9__XOP_MUL32, input_offset) { in TEST() argument
21198 TEST(QC8_DWCONV_MINMAX_FP32_UP24X25__AVX_MUL16, input_offset) { in TEST() argument
21384 TEST(QC8_DWCONV_MINMAX_FP32_UP24X25__AVX_MUL32, input_offset) { in TEST() argument
21570 TEST(QC8_DWCONV_MINMAX_FP32_UP24X25__AVX2_MUL32, input_offset) { in TEST() argument
21756 TEST(QC8_DWCONV_MINMAX_FP32_UP24X25__XOP_MUL32, input_offset) { in TEST() argument
21942 TEST(QC8_DWCONV_MINMAX_FP32_UP32X9__AVX2_MUL16_ADD16_VPUNPCK, input_offset) { in TEST() argument
22128 TEST(QC8_DWCONV_MINMAX_FP32_UP32X9__AVX2_MUL16_VPMOVSX, input_offset) { in TEST() argument
22314 TEST(QC8_DWCONV_MINMAX_FP32_UP32X9__AVX2_MUL16_VPUNPCK, input_offset) { in TEST() argument
22500 TEST(QC8_DWCONV_MINMAX_FP32_UP32X9__AVX2_MUL32, input_offset) { in TEST() argument
22686 TEST(QC8_DWCONV_MINMAX_FP32_UP32X25__AVX2_MUL16_ADD16_VPUNPCK, input_offset) { in TEST() argument
22872 TEST(QC8_DWCONV_MINMAX_FP32_UP32X25__AVX2_MUL16_VPMOVSX, input_offset) { in TEST() argument
23058 TEST(QC8_DWCONV_MINMAX_FP32_UP32X25__AVX2_MUL16_VPUNPCK, input_offset) { in TEST() argument
23244 TEST(QC8_DWCONV_MINMAX_FP32_UP32X25__AVX2_MUL32, input_offset) { in TEST() argument
23430 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__AVX512SKX_MUL32, input_offset) { in TEST() argument
23616 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__AVX512SKX_MUL32, input_offset) { in TEST() argument
23802 TEST(QC8_DWCONV_MINMAX_FP32_UP32X3__AVX512SKX_MUL32, input_offset) { in TEST() argument
23988 TEST(QC8_DWCONV_MINMAX_FP32_UP32X9__AVX512SKX_MUL32, input_offset) { in TEST() argument
24174 TEST(QC8_DWCONV_MINMAX_FP32_UP32X25__AVX512SKX_MUL32, input_offset) { in TEST() argument
24347 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__WASMSIMD_MUL16, input_offset) { in TEST() argument
24518 TEST(QC8_DWCONV_MINMAX_FP32_UP8X9__WASMSIMD_MUL16_ADD16, input_offset) { in TEST() argument
24689 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__WASMSIMD_MUL16, input_offset) { in TEST() argument
24860 TEST(QC8_DWCONV_MINMAX_FP32_UP8X25__WASMSIMD_MUL16_ADD16, input_offset) { in TEST() argument
25031 TEST(QC8_DWCONV_MINMAX_FP32_UP16X3__WASMSIMD_MUL16_ADD16, input_offset) { in TEST() argument
25202 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__WASMSIMD_MUL16, input_offset) { in TEST() argument
25373 TEST(QC8_DWCONV_MINMAX_FP32_UP16X9__WASMSIMD_MUL16_ADD16, input_offset) { in TEST() argument
25544 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__WASMSIMD_MUL16, input_offset) { in TEST() argument
25715 TEST(QC8_DWCONV_MINMAX_FP32_UP16X25__WASMSIMD_MUL16_ADD16, input_offset) { in TEST() argument
25886 TEST(QC8_DWCONV_MINMAX_FP32_UP24X9__WASMSIMD_MUL16, input_offset) { in TEST() argument
26057 TEST(QC8_DWCONV_MINMAX_FP32_UP24X9__WASMSIMD_MUL16_ADD16, input_offset) { in TEST() argument
26228 TEST(QC8_DWCONV_MINMAX_FP32_UP24X25__WASMSIMD_MUL16, input_offset) { in TEST() argument
26399 TEST(QC8_DWCONV_MINMAX_FP32_UP24X25__WASMSIMD_MUL16_ADD16, input_offset) { in TEST() argument
26528 TEST(QC8_DWCONV_MINMAX_FP32_UP1X9__WASM_FMAGIC, input_offset) { in TEST() argument
26657 TEST(QC8_DWCONV_MINMAX_FP32_UP1X25__WASM_FMAGIC, input_offset) { in TEST() argument
26828 TEST(QC8_DWCONV_MINMAX_FP32_UP2X3__WASM_FMAGIC, input_offset) { in TEST() argument
26999 TEST(QC8_DWCONV_MINMAX_FP32_UP2X9__WASM_FMAGIC, input_offset) { in TEST() argument
27170 TEST(QC8_DWCONV_MINMAX_FP32_UP2X25__WASM_FMAGIC, input_offset) { in TEST() argument
27341 TEST(QC8_DWCONV_MINMAX_FP32_UP4X9__WASM_FMAGIC, input_offset) { in TEST() argument
27512 TEST(QC8_DWCONV_MINMAX_FP32_UP4X25__WASM_FMAGIC, input_offset) { in TEST() argument
27640 TEST(QC8_DWCONV_MINMAX_FP32_UP1X9__SCALAR_FMAGIC, input_offset) { in TEST() argument
27766 TEST(QC8_DWCONV_MINMAX_FP32_UP1X9__SCALAR_IMAGIC, input_offset) { in TEST() argument
27892 TEST(QC8_DWCONV_MINMAX_FP32_UP1X9__SCALAR_LRINTF, input_offset) { in TEST() argument
28018 TEST(QC8_DWCONV_MINMAX_FP32_UP1X25__SCALAR_FMAGIC, input_offset) { in TEST() argument
28144 TEST(QC8_DWCONV_MINMAX_FP32_UP1X25__SCALAR_IMAGIC, input_offset) { in TEST() argument
28270 TEST(QC8_DWCONV_MINMAX_FP32_UP1X25__SCALAR_LRINTF, input_offset) { in TEST() argument
28438 TEST(QC8_DWCONV_MINMAX_FP32_UP2X3__SCALAR_IMAGIC, input_offset) { in TEST() argument
28606 TEST(QC8_DWCONV_MINMAX_FP32_UP2X3__SCALAR_LRINTF, input_offset) { in TEST() argument
28774 TEST(QC8_DWCONV_MINMAX_FP32_UP2X9__SCALAR_FMAGIC, input_offset) { in TEST() argument
28942 TEST(QC8_DWCONV_MINMAX_FP32_UP2X9__SCALAR_IMAGIC, input_offset) { in TEST() argument
29110 TEST(QC8_DWCONV_MINMAX_FP32_UP2X9__SCALAR_LRINTF, input_offset) { in TEST() argument
29278 TEST(QC8_DWCONV_MINMAX_FP32_UP2X25__SCALAR_FMAGIC, input_offset) { in TEST() argument
29446 TEST(QC8_DWCONV_MINMAX_FP32_UP2X25__SCALAR_IMAGIC, input_offset) { in TEST() argument
29614 TEST(QC8_DWCONV_MINMAX_FP32_UP2X25__SCALAR_LRINTF, input_offset) { in TEST() argument
29782 TEST(QC8_DWCONV_MINMAX_FP32_UP4X9__SCALAR_FMAGIC, input_offset) { in TEST() argument
29950 TEST(QC8_DWCONV_MINMAX_FP32_UP4X9__SCALAR_IMAGIC, input_offset) { in TEST() argument
30118 TEST(QC8_DWCONV_MINMAX_FP32_UP4X9__SCALAR_LRINTF, input_offset) { in TEST() argument
30286 TEST(QC8_DWCONV_MINMAX_FP32_UP4X25__SCALAR_FMAGIC, input_offset) { in TEST() argument
30454 TEST(QC8_DWCONV_MINMAX_FP32_UP4X25__SCALAR_IMAGIC, input_offset) { in TEST() argument
30622 TEST(QC8_DWCONV_MINMAX_FP32_UP4X25__SCALAR_LRINTF, input_offset) { in TEST() argument