392   TEST(F32_IGEMM_RELU_1X8__WASMSIMD_SPLAT, a_offset) {  in TEST()  argument
807   TEST(F32_IGEMM_RELU_1X8S4__WASMSIMD, a_offset) {  in TEST()  argument
1156   TEST(F32_IGEMM_RELU_3X8__WASMSIMD_LOADSPLAT, a_offset) {  in TEST()  argument
1505   TEST(F32_IGEMM_RELU_4X8__WASMSIMD_LOADSPLAT, a_offset) {  in TEST()  argument
1920   TEST(F32_IGEMM_RELU_4X8__WASMSIMD_SPLAT, a_offset) {  in TEST()  argument
2269   TEST(F32_IGEMM_RELU_5X8__WASMSIMD_LOADSPLAT, a_offset) {  in TEST()  argument
2684   TEST(F32_IGEMM_RELU_5X8__WASMSIMD_SPLAT, a_offset) {  in TEST()  argument
3099   TEST(F32_IGEMM_RELU_6X8S4__WASMSIMD, a_offset) {  in TEST()  argument
3514   TEST(F32_IGEMM_RELU_1X8__WASMRELAXEDSIMD_FMA_SPLAT, a_offset) {  in TEST()  argument
3929   TEST(F32_IGEMM_RELU_1X8S4__WASMRELAXEDSIMD_FMA, a_offset) {  in TEST()  argument
4344   TEST(F32_IGEMM_RELU_3X8__WASMRELAXEDSIMD_FMA_SPLAT, a_offset) {  in TEST()  argument
4759   TEST(F32_IGEMM_RELU_4X2C4__WASMRELAXEDSIMD_FMA, a_offset) {  in TEST()  argument
5174   TEST(F32_IGEMM_RELU_4X8__WASMRELAXEDSIMD_FMA_SPLAT, a_offset) {  in TEST()  argument
5589   TEST(F32_IGEMM_RELU_5X8__WASMRELAXEDSIMD_FMA_SPLAT, a_offset) {  in TEST()  argument
6004   TEST(F32_IGEMM_RELU_5X8S4__WASMRELAXEDSIMD_FMA, a_offset) {  in TEST()  argument
6419   TEST(F32_IGEMM_RELU_6X8__WASMRELAXEDSIMD_FMA_SPLAT, a_offset) {  in TEST()  argument
6834   TEST(F32_IGEMM_RELU_6X8S4__WASMRELAXEDSIMD_FMA, a_offset) {  in TEST()  argument
7183   TEST(F32_IGEMM_RELU_1X4__WASM, a_offset) {  in TEST()  argument
7531 TEST(F32_IGEMM_RELU_2X4__SCALAR, a_offset) {  in TEST()  argument