Merge branch 'master' into vlsu-merge-master-0504

Decode: correctly specify fp inst's src num

backend: add scalar float function unit

Decode: add vfreduction to wfflagsInsts (#2945)

Decode: remove fix frflags

* Since this optimization has not been used, we remove it to make correct hand-shake between rename and dispatch

riscv-zicond: Add Zicond Extension (#2941)

This PR added RISC-V Integer Conditional Operations Extension, which is
in the RVA23U64 Profile Mandatory Base. And the performance of
conditional move i

riscv-zicond: Add Zicond Extension (#2941)

This PR added RISC-V Integer Conditional Operations Extension, which is
in the RVA23U64 Profile Mandatory Base. And the performance of
conditional move instructions in micro-architecture is an interesting
point to explore.

Zicond instructions added: czero.eqz, czero.nez

Changes based on spec:

https://github.com/riscvarchive/riscv-zicond/releases/download/v1.0.1/riscv-zicond_1.0.1.pdf

Signed-off-by: Yangyu Chen <[email protected]>

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DecodeUnit: clean up decoder (#2943)

This commit sorts out decode by the ratified name of each extension for
Zb* and Zk*. And add some comments about RV32 concerns we may need
someday.

Signed-o

DecodeUnit: clean up decoder (#2943)

This commit sorts out decode by the ratified name of each extension for
Zb* and Zk*. And add some comments about RV32 concerns we may need
someday.

Signed-off-by: Yangyu Chen <[email protected]>

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Merge branch 'master' into vlsu-tmp-master

rv64v: ignore oldvd only when read vector register

rv64v: fix rf write signal when vset instruction's rd is zero

rv64v: add new uop split method for segment indexed vload/vstore

Decode: add waitForward and blockBackward in vector segment load/store

* Only the first uop has waitForward flag.
* Only the last uop has blockBackward flag.
* Only the uop with blockBackward flag w

Decode: add waitForward and blockBackward in vector segment load/store

* Only the first uop has waitForward flag.
* Only the last uop has blockBackward flag.
* Only the uop with blockBackward flag will block the next uop in Dispatch, remove waitForward flag from block condition.

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rv64v: fix some corner case when reduction intsurctinos depend on oldvd

rv64v: add ignore oldvd judgement in issue queue
1. when the instruction depend on old vd, we cannot set the srctype to imm
2. when vl = 0, we cannot set the srctype to imm because the vd keep the ol

rv64v: add ignore oldvd judgement in issue queue
1. when the instruction depend on old vd, we cannot set the srctype to imm
2. when vl = 0, we cannot set the srctype to imm because the vd keep the old value
3. when vl = vlmax, we can set srctype to imm when vta is not se

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numOfWB: make vector indexed instructions have dependencies between them

Co-authored-by: Ziyue Zhang <[email protected]>

DecodeUnit: Unmasked vld should not rely on unnecessary old vd

Old vd refers to the original value in the register, which may be repeatedly assigned during the loop,
causing the same load instructio

DecodeUnit: Unmasked vld should not rely on unnecessary old vd

Old vd refers to the original value in the register, which may be repeatedly assigned during the loop,
causing the same load instruction to be mistakenly dependent in two consecutive loops.

For example:
vsetvli a5,a4,e32,m1,tu,ma
vle32.v v5,(a2) should rely on old vd as this instruction is tail undisturbed.
beqz

Another example:
vsetvli a5,t1,e32,m1,ta,ma
vle32.v v1,(s4) need not rely on old vd, because it is tail agnostic.
beqz

However, store instructions should always need vd as store data.

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rv64v: implement lsu & lsq vector datapath

rv64v: fix the logic of writing vtype for vsetvl instruction (#2875)

rv64v: fix initial value of vtype in walking process

DecodeUnit, IssueQueue: fp instructions do not read v0 & vconfig

Rename: remove old_pdest reading from RAT

rv64v: replace all i2f move instructions to i2v instructions

vfexu: remove isreverse from vecfuncunit

float: use VCVT module for all fcvt instructions
Co-authored-by: chengguanghui <[email protected]>

Merge remote-tracking branch 'upstream/master' into tmp-master

TODO: add gpaddr data path from frontend to backend